Lines Matching refs:submit
344 struct msm_gem_submit *submit, char *comm, char *cmd)
364 if (submit) {
368 for (i = 0; i < submit->nr_bos; i++)
369 if (should_dump(submit, i))
372 for (i = 0; i < submit->nr_cmds; i++)
373 if (!should_dump(submit, submit->cmd[i].idx))
379 for (i = 0; state->bos && i < submit->nr_bos; i++) {
380 if (should_dump(submit, i)) {
381 msm_gpu_crashstate_get_bo(state, submit->bos[i].obj,
382 submit->bos[i].iova, submit->bos[i].flags);
386 for (i = 0; state->bos && i < submit->nr_cmds; i++) {
387 int idx = submit->cmd[i].idx;
389 if (!should_dump(submit, submit->cmd[i].idx)) {
390 msm_gpu_crashstate_get_bo(state, submit->bos[idx].obj,
391 submit->bos[idx].iova, submit->bos[idx].flags);
405 struct msm_gem_submit *submit, char *comm, char *cmd)
417 struct msm_gem_submit *submit;
419 list_for_each_entry(submit, &ring->submits, node) {
420 if (submit->seqno > fence)
423 msm_update_fence(submit->ring->fctx,
424 submit->fence->seqno);
431 struct msm_gem_submit *submit;
435 list_for_each_entry(submit, &ring->submits, node)
436 if (submit->seqno == fence)
437 return submit;
449 struct msm_gem_submit *submit;
458 submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1);
459 if (submit) {
464 submit->queue->faults++;
466 task = get_pid_task(submit->pid, PIDTYPE_PID);
477 msm_rd_dump_submit(priv->hangrd, submit,
480 msm_rd_dump_submit(priv->hangrd, submit, NULL);
485 msm_gpu_crashstate_capture(gpu, submit, comm, cmd);
494 * bo's referenced by the offending submit are still around.
502 * For the current (faulting?) ring/submit advance the fence by
503 * one more to clear the faulting submit
526 list_for_each_entry(submit, &ring->submits, node)
527 gpu->funcs->submit(gpu, submit);
678 struct msm_gem_submit *submit)
680 int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT;
696 trace_msm_gpu_submit_retired(submit, elapsed, clock,
699 for (i = 0; i < submit->nr_bos; i++) {
700 struct msm_gem_object *msm_obj = submit->bos[i].obj;
703 msm_gem_unpin_iova(&msm_obj->base, submit->aspace);
709 msm_gem_submit_free(submit);
715 struct msm_gem_submit *submit, *tmp;
724 list_for_each_entry_safe(submit, tmp, &ring->submits, node) {
725 if (dma_fence_is_signaled(submit->fence))
726 retire_submit(gpu, ring, submit);
754 void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
758 struct msm_ringbuffer *ring = submit->ring;
767 submit->seqno = ++ring->seqno;
769 list_add_tail(&submit->node, &ring->submits);
771 msm_rd_dump_submit(priv->rd, submit, NULL);
775 for (i = 0; i < submit->nr_bos; i++) {
776 struct msm_gem_object *msm_obj = submit->bos[i].obj;
785 /* submit takes a reference to the bo and iova until retired: */
787 msm_gem_get_and_pin_iova(&msm_obj->base, submit->aspace, &iova);
789 if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)
790 dma_resv_add_excl_fence(drm_obj->resv, submit->fence);
791 else if (submit->bos[i].flags & MSM_SUBMIT_BO_READ)
792 dma_resv_add_shared_fence(drm_obj->resv, submit->fence);
797 gpu->funcs->submit(gpu, submit);
798 priv->lastctx = submit->queue->ctx;