Lines Matching defs:dpi
118 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
120 u32 tmp = readl(dpi->regs + offset) & ~mask;
123 writel(tmp, dpi->regs + offset);
126 static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
128 mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
131 static void mtk_dpi_enable(struct mtk_dpi *dpi)
133 mtk_dpi_mask(dpi, DPI_EN, EN, EN);
136 static void mtk_dpi_disable(struct mtk_dpi *dpi)
138 mtk_dpi_mask(dpi, DPI_EN, 0, EN);
141 static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
144 mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
146 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
148 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
152 static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
156 mtk_dpi_mask(dpi, width_addr,
159 mtk_dpi_mask(dpi, width_addr,
162 mtk_dpi_mask(dpi, porch_addr,
165 mtk_dpi_mask(dpi, porch_addr,
170 static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
173 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
176 static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
179 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
183 static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
186 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
190 static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
193 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
197 static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
206 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
210 static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
212 mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
215 static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
217 mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
220 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
222 mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
223 mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
226 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
229 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
231 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
233 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
235 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
239 static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
261 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
265 static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
291 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
294 static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
323 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
326 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
328 mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
331 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
333 mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
336 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
338 mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
341 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
343 mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
346 static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
348 if (dpi->conf->edge_sel_en)
349 mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
352 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
356 mtk_dpi_config_yuv422_enable(dpi, false);
357 mtk_dpi_config_csc_enable(dpi, false);
358 mtk_dpi_config_swap_input(dpi, false);
359 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
362 static void mtk_dpi_power_off(struct mtk_dpi *dpi)
364 if (WARN_ON(dpi->refcount == 0))
367 if (--dpi->refcount != 0)
370 mtk_dpi_disable(dpi);
371 clk_disable_unprepare(dpi->pixel_clk);
372 clk_disable_unprepare(dpi->engine_clk);
375 static int mtk_dpi_power_on(struct mtk_dpi *dpi)
379 if (++dpi->refcount != 1)
382 ret = clk_prepare_enable(dpi->engine_clk);
384 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
388 ret = clk_prepare_enable(dpi->pixel_clk);
390 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
397 clk_disable_unprepare(dpi->engine_clk);
399 dpi->refcount--;
403 static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
418 factor = dpi->conf->cal_factor(mode->clock);
422 dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
425 clk_set_rate(dpi->tvd_clk, pll_rate);
426 pll_rate = clk_get_rate(dpi->tvd_clk);
429 clk_set_rate(dpi->pixel_clk, vm.pixelclock);
430 vm.pixelclock = clk_get_rate(dpi->pixel_clk);
432 dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
470 mtk_dpi_sw_reset(dpi, true);
471 mtk_dpi_config_pol(dpi, &dpi_pol);
473 mtk_dpi_config_hsync(dpi, &hsync);
474 mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
475 mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
476 mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
477 mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
479 mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
480 mtk_dpi_config_interface(dpi, !!(vm.flags &
483 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1);
485 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
487 mtk_dpi_config_channel_limit(dpi, &limit);
488 mtk_dpi_config_bit_num(dpi, dpi->bit_num);
489 mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
490 mtk_dpi_config_yc_map(dpi, dpi->yc_map);
491 mtk_dpi_config_color_format(dpi, dpi->color_format);
492 mtk_dpi_config_2n_h_fre(dpi);
493 mtk_dpi_config_disable_edge(dpi);
494 mtk_dpi_sw_reset(dpi, false);
502 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
504 return drm_bridge_attach(bridge->encoder, dpi->next_bridge,
505 &dpi->bridge, flags);
512 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
514 drm_mode_copy(&dpi->mode, adjusted_mode);
519 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
521 mtk_dpi_power_off(dpi);
523 if (dpi->pinctrl && dpi->pins_gpio)
524 pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
529 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
531 if (dpi->pinctrl && dpi->pins_dpi)
532 pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi);
534 mtk_dpi_power_on(dpi);
535 mtk_dpi_set_display_mode(dpi, &dpi->mode);
536 mtk_dpi_enable(dpi);
548 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
550 mtk_dpi_power_on(dpi);
555 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
557 mtk_dpi_power_off(dpi);
567 struct mtk_dpi *dpi = dev_get_drvdata(dev);
571 ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
578 ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
585 dpi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
587 ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL, 0);
593 dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
594 dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
595 dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
596 dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
601 drm_encoder_cleanup(&dpi->encoder);
603 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
610 struct mtk_dpi *dpi = dev_get_drvdata(dev);
613 drm_encoder_cleanup(&dpi->encoder);
614 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
673 struct mtk_dpi *dpi;
678 dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
679 if (!dpi)
682 dpi->dev = dev;
683 dpi->conf = (struct mtk_dpi_conf *)of_device_get_match_data(dev);
685 dpi->pinctrl = devm_pinctrl_get(&pdev->dev);
686 if (IS_ERR(dpi->pinctrl)) {
687 dpi->pinctrl = NULL;
690 if (dpi->pinctrl) {
691 dpi->pins_gpio = pinctrl_lookup_state(dpi->pinctrl, "sleep");
692 if (IS_ERR(dpi->pins_gpio)) {
693 dpi->pins_gpio = NULL;
696 if (dpi->pins_gpio)
697 pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
699 dpi->pins_dpi = pinctrl_lookup_state(dpi->pinctrl, "default");
700 if (IS_ERR(dpi->pins_dpi)) {
701 dpi->pins_dpi = NULL;
706 dpi->regs = devm_ioremap_resource(dev, mem);
707 if (IS_ERR(dpi->regs)) {
708 ret = PTR_ERR(dpi->regs);
713 dpi->engine_clk = devm_clk_get(dev, "engine");
714 if (IS_ERR(dpi->engine_clk)) {
715 ret = PTR_ERR(dpi->engine_clk);
722 dpi->pixel_clk = devm_clk_get(dev, "pixel");
723 if (IS_ERR(dpi->pixel_clk)) {
724 ret = PTR_ERR(dpi->pixel_clk);
731 dpi->tvd_clk = devm_clk_get(dev, "pll");
732 if (IS_ERR(dpi->tvd_clk)) {
733 ret = PTR_ERR(dpi->tvd_clk);
740 dpi->irq = platform_get_irq(pdev, 0);
741 if (dpi->irq <= 0) {
742 dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
747 NULL, &dpi->next_bridge);
751 dev_info(dev, "Found bridge node: %pOF\n", dpi->next_bridge->of_node);
759 ret = mtk_ddp_comp_init(dev, dev->of_node, &dpi->ddp_comp, comp_id,
766 platform_set_drvdata(pdev, dpi);
768 dpi->bridge.funcs = &mtk_dpi_bridge_funcs;
769 dpi->bridge.of_node = dev->of_node;
770 dpi->bridge.type = DRM_MODE_CONNECTOR_DPI;
772 drm_bridge_add(&dpi->bridge);
776 drm_bridge_remove(&dpi->bridge);
786 struct mtk_dpi *dpi = platform_get_drvdata(pdev);
789 drm_bridge_remove(&dpi->bridge);
795 { .compatible = "mediatek,mt2701-dpi",
798 { .compatible = "mediatek,mt8173-dpi",
801 { .compatible = "mediatek,mt8183-dpi",
811 .name = "mediatek-dpi",