Lines Matching defs:ipu_plane
32 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
34 return container_of(p, struct ipu_plane, base);
86 int ipu_plane_irq(struct ipu_plane *ipu_plane)
88 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
145 void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
147 if (!IS_ERR_OR_NULL(ipu_plane->dp))
148 ipu_dp_put(ipu_plane->dp);
149 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
150 ipu_dmfc_put(ipu_plane->dmfc);
151 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
152 ipu_idmac_put(ipu_plane->ipu_ch);
153 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
154 ipu_idmac_put(ipu_plane->alpha_ch);
157 int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
162 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
163 if (IS_ERR(ipu_plane->ipu_ch)) {
164 ret = PTR_ERR(ipu_plane->ipu_ch);
169 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
171 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
172 if (IS_ERR(ipu_plane->alpha_ch)) {
173 ret = PTR_ERR(ipu_plane->alpha_ch);
180 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
181 if (IS_ERR(ipu_plane->dmfc)) {
182 ret = PTR_ERR(ipu_plane->dmfc);
187 if (ipu_plane->dp_flow >= 0) {
188 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
189 if (IS_ERR(ipu_plane->dp)) {
190 ret = PTR_ERR(ipu_plane->dp);
198 ipu_plane_put_resources(ipu_plane);
203 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
205 switch (ipu_plane->base.state->fb->format->format) {
218 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
220 if (ipu_plane->dp)
221 ipu_dp_enable(ipu_plane->ipu);
222 ipu_dmfc_enable_channel(ipu_plane->dmfc);
223 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
224 if (ipu_plane_separate_alpha(ipu_plane))
225 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
226 if (ipu_plane->dp)
227 ipu_dp_enable_channel(ipu_plane->dp);
230 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
236 ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
239 ipu_plane->base.base.id);
242 if (ipu_plane->dp && disable_dp_channel)
243 ipu_dp_disable_channel(ipu_plane->dp, false);
244 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
245 if (ipu_plane->alpha_ch)
246 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
247 ipu_dmfc_disable_channel(ipu_plane->dmfc);
248 if (ipu_plane->dp)
249 ipu_dp_disable(ipu_plane->ipu);
250 if (ipu_prg_present(ipu_plane->ipu))
251 ipu_prg_channel_disable(ipu_plane->ipu_ch);
256 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
258 if (ipu_plane->disabling) {
259 ipu_plane->disabling = false;
260 ipu_plane_disable(ipu_plane, false);
267 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
272 kfree(ipu_plane);
502 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
504 if (ipu_plane->dp)
505 ipu_dp_disable_channel(ipu_plane->dp, true);
506 ipu_plane->disabling = true;
547 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
562 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
563 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
565 switch (ipu_plane->dp_flow) {
568 ipu_dp_set_global_alpha(ipu_plane->dp,
572 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
577 ipu_dp_set_global_alpha(ipu_plane->dp,
591 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
592 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
603 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
604 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
605 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
606 if (ipu_plane_separate_alpha(ipu_plane)) {
607 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
608 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
610 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
616 switch (ipu_plane->dp_flow) {
618 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
621 ipu_dp_setup_channel(ipu_plane->dp, ics,
626 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
634 ipu_cpmem_zero(ipu_plane->ipu_ch);
635 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
636 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
637 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
638 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
639 ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
640 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
641 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
642 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
658 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
661 dev_dbg(ipu_plane->base.dev->dev,
669 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
672 dev_dbg(ipu_plane->base.dev->dev,
685 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
688 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
690 ipu_cpmem_zero(ipu_plane->alpha_ch);
691 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
694 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
695 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
696 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
697 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
698 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
699 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
700 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
703 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
707 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
708 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
709 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
710 ipu_plane_enable(ipu_plane);
722 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
731 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
749 struct ipu_plane *ipu_plane;
771 ipu_plane = to_ipu_plane(plane);
782 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
785 if (!ipu_prg_format_supported(ipu_plane->ipu,
796 ipu_plane = to_ipu_plane(plane);
810 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
811 ipu_prg_format_supported(ipu_plane->ipu,
825 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
829 struct ipu_plane *ipu_plane;
837 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
838 if (!ipu_plane) {
843 ipu_plane->ipu = ipu;
844 ipu_plane->dma = dma;
845 ipu_plane->dp_flow = dp;
850 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
856 kfree(ipu_plane);
860 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
863 drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0, 1);
865 drm_plane_create_zpos_immutable_property(&ipu_plane->base, 0);
867 return ipu_plane;