Lines Matching refs:tve
129 static void tve_enable(struct imx_tve *tve)
131 clk_prepare_enable(tve->clk);
132 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, TVE_EN);
135 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
138 if (tve->mode == TVE_MODE_VGA)
139 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0);
141 regmap_write(tve->regmap, TVE_INT_CONT_REG,
147 static void tve_disable(struct imx_tve *tve)
149 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0);
150 clk_disable_unprepare(tve->clk);
153 static int tve_setup_tvout(struct imx_tve *tve)
158 static int tve_setup_vga(struct imx_tve *tve)
165 ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG,
170 ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG,
175 ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG,
187 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val);
192 return regmap_update_bits(tve->regmap, TVE_TST_MODE_REG,
198 struct imx_tve *tve = con_to_tve(connector);
202 if (!tve->ddc)
205 edid = drm_get_edid(connector, tve->ddc);
219 struct imx_tve *tve = con_to_tve(connector);
223 rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
228 rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
232 dev_warn(tve->dev, "ignoring mode %dx%d\n",
242 struct imx_tve *tve = enc_to_tve(encoder);
254 clk_set_rate(tve->clk, rate);
255 rounded_rate = clk_get_rate(tve->clk);
258 clk_set_rate(tve->di_clk, rounded_rate / div);
260 ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
262 dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
266 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
269 if (tve->mode == TVE_MODE_VGA)
270 ret = tve_setup_vga(tve);
272 ret = tve_setup_tvout(tve);
274 dev_err(tve->dev, "failed to set configuration: %d\n", ret);
279 struct imx_tve *tve = enc_to_tve(encoder);
281 tve_enable(tve);
286 struct imx_tve *tve = enc_to_tve(encoder);
288 tve_disable(tve);
296 struct imx_tve *tve = enc_to_tve(encoder);
299 imx_crtc_state->di_hsync_pin = tve->di_hsync_pin;
300 imx_crtc_state->di_vsync_pin = tve->di_vsync_pin;
327 struct imx_tve *tve = data;
330 regmap_read(tve->regmap, TVE_STAT_REG, &val);
333 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff);
341 struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
345 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
378 struct imx_tve *tve = container_of(hw, struct imx_tve, clk_hw_di);
391 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
395 dev_err(tve->dev, "failed to set divider: %d\n", ret);
408 static int tve_clk_init(struct imx_tve *tve, void __iomem *base)
418 tve_di_parent[0] = __clk_get_name(tve->clk);
421 tve->clk_hw_di.init = &init;
422 tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di);
423 if (IS_ERR(tve->di_clk)) {
424 dev_err(tve->dev, "failed to register TVE output clock: %ld\n",
425 PTR_ERR(tve->di_clk));
426 return PTR_ERR(tve->di_clk);
432 static int imx_tve_register(struct drm_device *drm, struct imx_tve *tve)
437 encoder_type = tve->mode == TVE_MODE_VGA ?
440 ret = imx_drm_encoder_parse_of(drm, &tve->encoder, tve->dev->of_node);
444 drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs);
445 drm_simple_encoder_init(drm, &tve->encoder, encoder_type);
447 drm_connector_helper_add(&tve->connector,
449 drm_connector_init_with_ddc(drm, &tve->connector,
452 tve->ddc);
454 drm_connector_attach_encoder(&tve->connector, &tve->encoder);
461 struct imx_tve *tve = data;
463 regulator_disable(tve->dac_reg);
493 ret = of_property_read_string(np, "fsl,tve-mode", &bm);
510 struct imx_tve *tve;
517 tve = dev_get_drvdata(dev);
518 memset(tve, 0, sizeof(*tve));
520 tve->dev = dev;
524 tve->ddc = of_find_i2c_adapter_by_node(ddc_node);
528 tve->mode = of_get_tve_mode(np);
529 if (tve->mode != TVE_MODE_VGA) {
534 if (tve->mode == TVE_MODE_VGA) {
536 &tve->di_hsync_pin);
544 &tve->di_vsync_pin);
557 tve_regmap_config.lock_arg = tve;
558 tve->regmap = devm_regmap_init_mmio_clk(dev, "tve", base,
560 if (IS_ERR(tve->regmap)) {
562 PTR_ERR(tve->regmap));
563 return PTR_ERR(tve->regmap);
572 "imx-tve", tve);
578 tve->dac_reg = devm_regulator_get(dev, "dac");
579 if (!IS_ERR(tve->dac_reg)) {
580 if (regulator_get_voltage(tve->dac_reg) != IMX_TVE_DAC_VOLTAGE)
582 ret = regulator_enable(tve->dac_reg);
585 ret = devm_add_action_or_reset(dev, imx_tve_disable_regulator, tve);
590 tve->clk = devm_clk_get(dev, "tve");
591 if (IS_ERR(tve->clk)) {
592 dev_err(dev, "failed to get high speed tve clock: %ld\n",
593 PTR_ERR(tve->clk));
594 return PTR_ERR(tve->clk);
598 tve->di_sel_clk = devm_clk_get(dev, "di_sel");
599 if (IS_ERR(tve->di_sel_clk)) {
601 PTR_ERR(tve->di_sel_clk));
602 return PTR_ERR(tve->di_sel_clk);
605 ret = tve_clk_init(tve, base);
609 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val);
621 ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0);
625 ret = imx_tve_register(drm, tve);
638 struct imx_tve *tve;
640 tve = devm_kzalloc(&pdev->dev, sizeof(*tve), GFP_KERNEL);
641 if (!tve)
644 platform_set_drvdata(pdev, tve);
656 { .compatible = "fsl,imx53-tve", },
666 .name = "imx-tve",
675 MODULE_ALIAS("platform:imx-tve");