Lines Matching defs:active
674 * __---__---__ (- plane active, _ blanking)
680 * __----__----__ (- plane active, _ blanking)
722 * __ --__--__--__--__--__--__ (- plane active, _ blanking)
830 if (!crtc_state->hw.active)
858 * FIXME: The intel_crtc->active here should be switched to
859 * crtc->state->active once we have proper CRTC states wired up
862 return crtc->active && crtc->base.primary->state->fb &&
1461 const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal;
1464 if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) {
1472 intermediate->cxsr = optimal->cxsr && active->cxsr &&
1474 intermediate->hpll_en = optimal->hpll_en && active->hpll_en &&
1476 intermediate->fbc_en = optimal->fbc_en && active->fbc_en;
1481 active->wm.plane[plane_id]);
1488 active->sr.plane);
1490 active->sr.cursor);
1492 active->sr.fbc);
1495 active->hpll.plane);
1497 active->hpll.cursor);
1499 active->hpll.fbc);
1543 const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
1545 if (!crtc->active)
1565 const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x;
1569 if (crtc->active && wm->cxsr)
1571 if (crtc->active && wm->hpll_en)
1605 crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate;
1621 crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;
1774 /* give it all to the first plane if none are active */
1924 * planes are initially active.
2104 const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal;
2107 if (!new_crtc_state->hw.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->uapi)) {
2114 intermediate->num_levels = min(optimal->num_levels, active->num_levels);
2115 intermediate->cxsr = optimal->cxsr && active->cxsr &&
2124 active->wm[level].plane[plane_id]);
2128 active->sr[level].plane);
2130 active->sr[level].cursor);
2156 const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
2158 if (!crtc->active)
2175 const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv;
2179 if (crtc->active && wm->cxsr)
2230 crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate;
2246 crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
3166 pipe_wm->pipe_enabled = crtc_state->hw.active;
3232 * currently active watermarks to get values that are safe both before
3236 if (!newstate->hw.active || drm_atomic_crtc_needs_modeset(&newstate->uapi) ||
3275 * Merge the watermarks from all active pipes for a specific level.
3286 const struct intel_pipe_wm *active = &intel_crtc->wm.active.ilk;
3287 const struct intel_wm_level *wm = &active->wm[level];
3289 if (!active->pipe_enabled)
3308 * Merge all low power watermarks for all active pipes.
3433 const struct intel_pipe_wm *pipe_wm = &intel_crtc->wm.active.ilk;
3883 if (!crtc_state->hw.active)
3926 if (!crtc_state->hw.active)
4120 if (!crtc_state->hw.active) {
4131 * If the state doesn't change the active CRTC's or there is no
4135 * that changes the active CRTC list or do modeset would need to
4183 if (!crtc_state->hw.active)
4238 "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x\n",
4815 if (!crtc_state->hw.active) {
4876 * requirement of active planes.
4927 * We've accounted for all active planes; remaining planes are
5088 if (!crtc_state->hw.active)
5988 * all active pipes to be included in the state so that
6020 * all active pipes to be included in the state so that
6044 * (since we consider an offscreen cursor still active for the purposes
6150 const struct intel_pipe_wm *wm = &crtc->wm.active.ilk;
6201 crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate;
6217 crtc->wm.active.ilk = crtc_state->wm.ilk.optimal;
6265 if (!crtc->active)
6292 struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal;
6302 memset(active, 0, sizeof(*active));
6304 active->pipe_enabled = crtc->active;
6306 if (active->pipe_enabled) {
6310 * For active pipes LP0 watermark is marked as
6313 * multiple pipes are active.
6315 active->wm[0].enable = true;
6316 active->wm[0].pri_val = (tmp & WM0_PIPE_PLANE_MASK) >> WM0_PIPE_PLANE_SHIFT;
6317 active->wm[0].spr_val = (tmp & WM0_PIPE_SPRITE_MASK) >> WM0_PIPE_SPRITE_SHIFT;
6318 active->wm[0].cur_val = tmp & WM0_PIPE_CURSOR_MASK;
6328 active->wm[level].enable = true;
6331 crtc->wm.active.ilk = *active;
6453 struct g4x_wm_state *active = &crtc->wm.active.g4x;
6459 active->cxsr = wm->cxsr;
6460 active->hpll_en = wm->hpll_en;
6461 active->fbc_en = wm->fbc_en;
6463 active->sr = wm->sr;
6464 active->hpll = wm->hpll;
6467 active->wm.plane[plane_id] =
6481 raw->plane[plane_id] = active->wm.plane[plane_id];
6487 raw->plane[PLANE_PRIMARY] = active->sr.plane;
6488 raw->plane[PLANE_CURSOR] = active->sr.cursor;
6490 raw->fbc = active->sr.fbc;
6496 raw->plane[PLANE_PRIMARY] = active->hpll.plane;
6497 raw->plane[PLANE_CURSOR] = active->hpll.cursor;
6499 raw->fbc = active->hpll.fbc;
6507 crtc_state->wm.g4x.optimal = *active;
6508 crtc_state->wm.g4x.intermediate = *active;
6576 crtc->wm.active.g4x = crtc_state->wm.g4x.optimal;
6633 struct vlv_wm_state *active = &crtc->wm.active.vlv;
6642 active->num_levels = wm->level + 1;
6643 active->cxsr = wm->cxsr;
6645 for (level = 0; level < active->num_levels; level++) {
6649 active->sr[level].plane = wm->sr.plane;
6650 active->sr[level].cursor = wm->sr.cursor;
6653 active->wm[level].plane[plane_id] =
6657 vlv_invert_wm_value(active->wm[level].plane[plane_id],
6665 vlv_invalidate_wms(crtc, active, level);
6667 crtc_state->wm.vlv.optimal = *active;
6668 crtc_state->wm.vlv.intermediate = *active;
6725 crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;
6868 * start up when no ports are active.
6956 * start up when no ports are active.