Lines Matching refs:addr
1819 *cs++ = i915_mmio_reg_offset(reg_data[i].addr);
2066 if (i915_mmio_reg_offset(oa_config->flex_regs[i].addr) == mmio)
3801 static bool gen8_is_valid_flex_addr(struct i915_perf *perf, u32 addr)
3815 if (i915_mmio_reg_offset(flex_eu_regs[i]) == addr)
3821 #define ADDR_IN_RANGE(addr, start, end) \
3822 ((addr) >= (start) && \
3823 (addr) <= (end))
3825 #define REG_IN_RANGE(addr, start, end) \
3826 ((addr) >= i915_mmio_reg_offset(start) && \
3827 (addr) <= i915_mmio_reg_offset(end))
3829 #define REG_EQUAL(addr, mmio) \
3830 ((addr) == i915_mmio_reg_offset(mmio))
3832 static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr)
3834 return REG_IN_RANGE(addr, OASTARTTRIG1, OASTARTTRIG8) ||
3835 REG_IN_RANGE(addr, OAREPORTTRIG1, OAREPORTTRIG8) ||
3836 REG_IN_RANGE(addr, OACEC0_0, OACEC7_1);
3839 static bool gen7_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3841 return REG_EQUAL(addr, HALF_SLICE_CHICKEN2) ||
3842 REG_IN_RANGE(addr, MICRO_BP0_0, NOA_WRITE) ||
3843 REG_IN_RANGE(addr, OA_PERFCNT1_LO, OA_PERFCNT2_HI) ||
3844 REG_IN_RANGE(addr, OA_PERFMATRIX_LO, OA_PERFMATRIX_HI);
3847 static bool gen8_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3849 return gen7_is_valid_mux_addr(perf, addr) ||
3850 REG_EQUAL(addr, WAIT_FOR_RC6_EXIT) ||
3851 REG_IN_RANGE(addr, RPM_CONFIG0, NOA_CONFIG(8));
3854 static bool gen10_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3856 return gen8_is_valid_mux_addr(perf, addr) ||
3857 REG_EQUAL(addr, GEN10_NOA_WRITE_HIGH) ||
3858 REG_IN_RANGE(addr, OA_PERFCNT3_LO, OA_PERFCNT4_HI);
3861 static bool hsw_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3863 return gen7_is_valid_mux_addr(perf, addr) ||
3864 ADDR_IN_RANGE(addr, 0x25100, 0x2FF90) ||
3865 REG_IN_RANGE(addr, HSW_MBVID2_NOA0, HSW_MBVID2_NOA9) ||
3866 REG_EQUAL(addr, HSW_MBVID2_MISR0);
3869 static bool chv_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3871 return gen7_is_valid_mux_addr(perf, addr) ||
3872 ADDR_IN_RANGE(addr, 0x182300, 0x1823A4);
3875 static bool gen12_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr)
3877 return REG_IN_RANGE(addr, GEN12_OAG_OASTARTTRIG1, GEN12_OAG_OASTARTTRIG8) ||
3878 REG_IN_RANGE(addr, GEN12_OAG_OAREPORTTRIG1, GEN12_OAG_OAREPORTTRIG8) ||
3879 REG_IN_RANGE(addr, GEN12_OAG_CEC0_0, GEN12_OAG_CEC7_1) ||
3880 REG_IN_RANGE(addr, GEN12_OAG_SCEC0_0, GEN12_OAG_SCEC7_1) ||
3881 REG_EQUAL(addr, GEN12_OAA_DBG_REG) ||
3882 REG_EQUAL(addr, GEN12_OAG_OA_PESS) ||
3883 REG_EQUAL(addr, GEN12_OAG_SPCTR_CNF);
3886 static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
3888 return REG_EQUAL(addr, NOA_WRITE) ||
3889 REG_EQUAL(addr, GEN10_NOA_WRITE_HIGH) ||
3890 REG_EQUAL(addr, GDT_CHICKEN_BITS) ||
3891 REG_EQUAL(addr, WAIT_FOR_RC6_EXIT) ||
3892 REG_EQUAL(addr, RPM_CONFIG0) ||
3893 REG_EQUAL(addr, RPM_CONFIG1) ||
3894 REG_IN_RANGE(addr, NOA_CONFIG(0), NOA_CONFIG(8));
3917 bool (*is_valid)(struct i915_perf *perf, u32 addr),
3938 u32 addr, value;
3940 err = get_user(addr, regs);
3944 if (!is_valid(perf, addr)) {
3945 DRM_DEBUG("Invalid oa_reg address: %X\n", addr);
3954 oa_regs[i].addr = _MMIO(addr);
3955 oa_regs[i].value = mask_reg_value(addr, value);