Lines Matching refs:gvt

35 #include "gvt.h"
40 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
102  * @gvt : GVT device
107 int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
125 	low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
126 	high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
129 	gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type),
131 	if (!gvt->types)
139 		gvt->types[i].low_gm_size = vgpu_types[i].low_mm;
140 		gvt->types[i].high_gm_size = vgpu_types[i].high_mm;
141 		gvt->types[i].fence = vgpu_types[i].fence;
147 		gvt->types[i].weight = vgpu_types[i].weight;
148 		gvt->types[i].resolution = vgpu_types[i].edid;
149 		gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm,
152 		if (IS_GEN(gvt->gt->i915, 8))
153 			sprintf(gvt->types[i].name, "GVTg_V4_%s",
155 		else if (IS_GEN(gvt->gt->i915, 9))
156 			sprintf(gvt->types[i].name, "GVTg_V5_%s",
160 			     i, gvt->types[i].name,
161 			     gvt->types[i].avail_instance,
162 			     gvt->types[i].low_gm_size,
163 			     gvt->types[i].high_gm_size, gvt->types[i].fence,
164 			     gvt->types[i].weight,
165 			     vgpu_edid_str(gvt->types[i].resolution));
168 	gvt->num_types = i;
172 void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
174 	kfree(gvt->types);
177 static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt)
186 	low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE -
187 		gvt->gm.vgpu_allocated_low_gm_size;
188 	high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE -
189 		gvt->gm.vgpu_allocated_high_gm_size;
190 	fence_avail = gvt_fence_sz(gvt) - HOST_FENCE -
191 		gvt->fence.vgpu_allocated_fence_num;
193 	for (i = 0; i < gvt->num_types; i++) {
194 		low_gm_min = low_gm_avail / gvt->types[i].low_gm_size;
195 		high_gm_min = high_gm_avail / gvt->types[i].high_gm_size;
196 		fence_min = fence_avail / gvt->types[i].fence;
197 		gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min),
201 		       i, gvt->types[i].name,
202 		       gvt->types[i].avail_instance, gvt->types[i].low_gm_size,
203 		       gvt->types[i].high_gm_size, gvt->types[i].fence);
275 	struct intel_gvt *gvt = vgpu->gvt;
276 	struct drm_i915_private *i915 = gvt->gt->i915;
284 	mutex_lock(&gvt->lock);
285 	idr_remove(&gvt->vgpu_idr, vgpu->id);
286 	mutex_unlock(&gvt->lock);
302 	mutex_lock(&gvt->lock);
303 	if (idr_is_empty(&gvt->vgpu_idr))
304 		intel_gvt_clean_irq(gvt);
305 	intel_gvt_update_vgpu_types(gvt);
306 	mutex_unlock(&gvt->lock);
315  * @gvt: GVT device
322 struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt)
333 	vgpu->gvt = gvt;
368 static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
371 	struct drm_i915_private *dev_priv = gvt->gt->i915;
383 	ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU,
390 	vgpu->gvt = gvt;
466 	idr_remove(&gvt->vgpu_idr, vgpu->id);
474  * @gvt: GVT device
482 struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
500 	mutex_lock(&gvt->lock);
501 	vgpu = __intel_gvt_create_vgpu(gvt, &param);
504 		intel_gvt_update_vgpu_types(gvt);
505 	mutex_unlock(&gvt->lock);
541 	struct intel_gvt *gvt = vgpu->gvt;
542 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;