Lines Matching defs:engine
97 if (workload->engine->id != RCS0)
137 int ring_id = workload->engine->id;
160 if (workload->engine->id == RCS0) {
178 workload->engine->name, workload->ctx_desc.lrca,
202 context_page_num = workload->engine->context_size;
205 if (IS_BROADWELL(gvt->gt->i915) && workload->engine->id == RCS0)
250 const struct intel_engine_cs *engine)
252 struct intel_uncore *uncore = engine->uncore;
255 reg = RING_INSTDONE(engine->mmio_base);
259 reg = RING_ACTHD(engine->mmio_base);
263 reg = RING_ACTHD_UDW(engine->mmio_base);
273 shadow_ctx_notifier_block[rq->engine->id]);
275 enum intel_engine_id ring_id = rq->engine->id;
285 NULL, rq->engine);
303 workload->vgpu, rq->engine);
312 save_ring_hw_state(workload->vgpu, rq->engine);
316 save_ring_hw_state(workload->vgpu, rq->engine);
351 if (IS_GEN(req->engine->i915, 9) && is_inhibit_context(req->context))
364 if (req->engine->emit_init_breadcrumb) {
365 err = req->engine->emit_init_breadcrumb(req);
448 rq = i915_request_create(s->shadow[workload->engine->id]);
477 if (!test_and_set_bit(workload->engine->id, s->shadow_ctx_desc_updated))
478 shadow_context_descriptor_update(s->shadow[workload->engine->id],
485 if (workload->engine->id == RCS0 &&
606 vgpu_vreg_t(workload->vgpu, RING_START(workload->engine->mmio_base)) =
703 set_context_ppgtt_from_shadow(workload, s->shadow[workload->engine->id]);
758 workload->engine->name, workload);
788 workload->engine->name, workload->req);
800 pick_next_workload(struct intel_gvt *gvt, struct intel_engine_cs *engine)
812 gvt_dbg_sched("ring %s stop - no current vgpu\n", engine->name);
817 gvt_dbg_sched("ring %s stop - will reschedule\n", engine->name);
822 list_empty(workload_q_head(scheduler->current_vgpu, engine)))
829 if (scheduler->current_workload[engine->id]) {
830 workload = scheduler->current_workload[engine->id];
832 engine->name, workload);
842 scheduler->current_workload[engine->id] =
844 engine),
847 workload = scheduler->current_workload[engine->id];
849 gvt_dbg_sched("ring %s pick new workload %p\n", engine->name, workload);
904 gvt_dbg_sched("ring id %d workload lrca %x\n", rq->engine->id,
922 ring_base = rq->engine->mmio_base;
926 context_page_num = rq->engine->context_size;
929 if (IS_BROADWELL(rq->engine->i915) && rq->engine->id == RCS0)
1004 struct intel_engine_cs *engine;
1009 for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) {
1011 &s->workload_q_head[engine->id], list) {
1015 clear_bit(engine->id, s->shadow_ctx_desc_updated);
1080 * if it is in middle of engine resetting, the pending
1105 struct intel_engine_cs *engine = arg;
1106 const bool need_force_wake = INTEL_GEN(engine->i915) >= 9;
1107 struct intel_gvt *gvt = engine->i915->gvt;
1114 gvt_dbg_core("workload thread for ring %s started\n", engine->name);
1119 add_wait_queue(&scheduler->waitq[engine->id], &wait);
1121 workload = pick_next_workload(gvt, engine);
1127 remove_wait_queue(&scheduler->waitq[engine->id], &wait);
1133 engine->name, workload,
1136 wakeref = intel_runtime_pm_get(engine->uncore->rpm);
1139 engine->name, workload);
1142 intel_uncore_forcewake_get(engine->uncore,
1161 engine->name, workload);
1168 complete_current_workload(gvt, engine->id);
1171 intel_uncore_forcewake_put(engine->uncore,
1174 intel_runtime_pm_put(engine->uncore->rpm, wakeref);
1198 struct intel_engine_cs *engine;
1203 for_each_engine(engine, gvt->gt, i) {
1205 &engine->context_status_notifier,
1214 struct intel_engine_cs *engine;
1222 for_each_engine(engine, gvt->gt, i) {
1225 scheduler->thread[i] = kthread_run(workload_thread, engine,
1226 "gvt:%s", engine->name);
1235 atomic_notifier_chain_register(&engine->context_status_notifier,
1274 struct intel_engine_cs *engine;
1280 for_each_engine(engine, vgpu->gvt->gt, id)
1339 struct intel_engine_cs *engine;
1350 for_each_engine(engine, vgpu->gvt->gt, i) {
1356 ce = intel_context_create(engine);
1367 if (!intel_uc_wants_guc_submission(&engine->gt->uc)) {
1400 for_each_engine(engine, vgpu->gvt->gt, i) {
1413 * @engine_mask: either ALL_ENGINES or target engine mask
1477 intel_context_unpin(s->shadow[workload->engine->id]);
1572 * @engine: the engine
1584 const struct intel_engine_cs *engine,
1588 struct list_head *q = workload_q_head(vgpu, engine);
1618 engine->name);
1630 gvt_dbg_el("ring %s begin a new workload\n", engine->name);
1650 workload->engine = engine;
1659 if (engine->id == RCS0) {
1698 workload, engine->name, head, tail, start, ctl);
1712 with_intel_runtime_pm(engine->gt->uncore->rpm, wakeref)
1723 ret = intel_context_pin(s->shadow[engine->id]);
1739 workload_q_head(workload->vgpu, workload->engine));
1741 wake_up(&workload->vgpu->gvt->scheduler.waitq[workload->engine->id]);