Lines Matching refs:gvt
37 #include "gvt.h"
53 #define reg_is_mmio(gvt, reg) \
54 (reg >= 0 && reg < gvt->device_info.mmio_size)
56 #define reg_is_gtt(gvt, reg) \
57 (reg >= gvt->device_info.gtt_start_offset \
58 && reg < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt))
63 struct intel_gvt *gvt = NULL;
70 gvt = vgpu->gvt;
73 if (reg_is_mmio(gvt, offset)) {
80 } else if (reg_is_gtt(gvt, offset)) {
81 offset -= gvt->device_info.gtt_start_offset;
105 struct intel_gvt *gvt = vgpu->gvt;
106 struct drm_i915_private *i915 = gvt->gt->i915;
121 if (reg_is_gtt(gvt, offset)) {
128 !reg_is_gtt(gvt, offset + bytes - 1)))
138 if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {
143 if (drm_WARN_ON(&i915->drm, !reg_is_mmio(gvt, offset + bytes - 1)))
146 if (!intel_gvt_mmio_is_unalign(gvt, offset)) {
155 intel_gvt_mmio_set_accessed(gvt, offset);
180 struct intel_gvt *gvt = vgpu->gvt;
181 struct drm_i915_private *i915 = gvt->gt->i915;
197 if (reg_is_gtt(gvt, offset)) {
204 !reg_is_gtt(gvt, offset + bytes - 1)))
214 if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {
223 intel_gvt_mmio_set_accessed(gvt, offset);
242 struct intel_gvt *gvt = vgpu->gvt;
243 const struct intel_gvt_device_info *info = &gvt->device_info;
244 void *mmio = gvt->firmware.mmio;
257 if (IS_BROXTON(vgpu->gvt->gt->i915)) {
309 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;