Lines Matching defs:bytes
75 void *p_data, unsigned int bytes)
77 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);
81 void *p_data, unsigned int bytes)
83 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);
195 unsigned int fence_num, void *p_data, unsigned int bytes)
211 memset(p_data, 0, bytes);
218 unsigned int offset, void *p_data, unsigned int bytes)
238 write_vreg(vgpu, offset, p_data, bytes);
243 void *p_data, unsigned int bytes)
248 p_data, bytes);
251 read_vreg(vgpu, off, p_data, bytes);
256 void *p_data, unsigned int bytes)
262 ret = sanitize_fence_mmio_access(vgpu, fence_num, p_data, bytes);
265 write_vreg(vgpu, off, p_data, bytes);
280 unsigned int offset, void *p_data, unsigned int bytes)
314 void *p_data, unsigned int bytes)
319 write_vreg(vgpu, offset, p_data, bytes);
363 void *p_data, unsigned int bytes)
365 return intel_gvt_i2c_handle_gmbus_read(vgpu, offset, p_data, bytes);
369 void *p_data, unsigned int bytes)
371 return intel_gvt_i2c_handle_gmbus_write(vgpu, offset, p_data, bytes);
375 unsigned int offset, void *p_data, unsigned int bytes)
377 write_vreg(vgpu, offset, p_data, bytes);
393 unsigned int offset, void *p_data, unsigned int bytes)
395 write_vreg(vgpu, offset, p_data, bytes);
405 void *p_data, unsigned int bytes)
407 write_vreg(vgpu, offset, p_data, bytes);
423 void *p_data, unsigned int bytes)
442 read_vreg(vgpu, offset, p_data, bytes);
447 void *p_data, unsigned int bytes)
451 write_vreg(vgpu, offset, p_data, bytes);
520 unsigned int offset, void *p_data, unsigned int bytes)
526 if (bytes != 4 || !IS_ALIGNED(offset, bytes) || !engine) {
528 vgpu->id, offset, bytes);
537 intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);
543 void *p_data, unsigned int bytes)
545 write_vreg(vgpu, offset, p_data, bytes);
559 unsigned int offset, void *p_data, unsigned int bytes)
650 unsigned int offset, void *p_data, unsigned int bytes)
667 write_vreg(vgpu, offset, p_data, bytes);
694 void *p_data, unsigned int bytes)
700 write_vreg(vgpu, offset, p_data, bytes);
712 unsigned int offset, void *p_data, unsigned int bytes)
727 unsigned int offset, void *p_data, unsigned int bytes)
731 write_vreg(vgpu, offset, p_data, bytes);
740 unsigned int offset, void *p_data, unsigned int bytes)
744 write_vreg(vgpu, offset, p_data, bytes);
758 void *p_data, unsigned int bytes)
764 write_vreg(vgpu, offset, p_data, bytes);
781 void *p_data, unsigned int bytes)
786 write_vreg(vgpu, offset, p_data, bytes);
799 unsigned int bytes)
806 write_vreg(vgpu, offset, p_data, bytes);
911 unsigned int offset, void *p_data, unsigned int bytes)
925 write_vreg(vgpu, offset, p_data, bytes);
975 * 4 bytes, followed by (len + 1) bytes of data. See details at
1043 * Read reply format: ACK (1 byte) plus (len + 1) bytes of data.
1051 /* first 4 bytes: [ACK][addr][addr+1][addr+2] */
1081 void *p_data, unsigned int bytes)
1084 write_vreg(vgpu, offset, p_data, bytes);
1089 void *p_data, unsigned int bytes)
1093 write_vreg(vgpu, offset, p_data, bytes);
1143 void *p_data, unsigned int bytes)
1152 read_vreg(vgpu, offset, p_data, bytes);
1157 void *p_data, unsigned int bytes)
1161 write_vreg(vgpu, offset, p_data, bytes);
1187 void *p_data, unsigned int bytes)
1191 read_vreg(vgpu, offset, p_data, bytes);
1195 if (offset + bytes > _vgtif_reg(vgt_id) + 4)
1200 if (offset + bytes >
1213 offset, bytes, *(u32 *)p_data);
1263 void *p_data, unsigned int bytes)
1295 gvt_vgpu_err("invalid pvinfo write offset %x bytes %x data %x\n",
1296 offset, bytes, data);
1301 write_vreg(vgpu, offset, p_data, bytes);
1307 unsigned int offset, void *p_data, unsigned int bytes)
1321 return intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);
1325 unsigned int offset, void *p_data, unsigned int bytes)
1327 write_vreg(vgpu, offset, p_data, bytes);
1340 unsigned int offset, void *p_data, unsigned int bytes)
1342 write_vreg(vgpu, offset, p_data, bytes);
1353 unsigned int offset, void *p_data, unsigned int bytes)
1355 write_vreg(vgpu, offset, p_data, bytes);
1363 void *p_data, unsigned int bytes)
1368 write_vreg(vgpu, offset, p_data, bytes);
1382 void *p_data, unsigned int bytes)
1393 write_vreg(vgpu, offset, p_data, bytes);
1399 void *p_data, unsigned int bytes)
1401 write_vreg(vgpu, offset, p_data, bytes);
1406 void *p_data, unsigned int bytes)
1424 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1428 void *p_data, unsigned int bytes)
1482 return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);
1486 void *p_data, unsigned int bytes)
1513 return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);
1517 unsigned int offset, void *p_data, unsigned int bytes)
1528 return intel_vgpu_default_mmio_write(vgpu, offset, &v, bytes);
1532 void *p_data, unsigned int bytes)
1546 unsigned int offset, void *p_data, unsigned int bytes)
1559 unsigned int offset, void *p_data, unsigned int bytes)
1572 unsigned int offset, void *p_data, unsigned int bytes)
1593 unsigned int offset, void *p_data, unsigned int bytes)
1601 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1605 unsigned int offset, void *p_data, unsigned int bytes)
1623 unsigned int offset, void *p_data, unsigned int bytes)
1648 unsigned int offset, void *p_data, unsigned int bytes)
1665 void *p_data, unsigned int bytes)
1684 unsigned int bytes)
1687 read_vreg(vgpu, offset, p_data, bytes);
1693 unsigned int offset, void *p_data, unsigned int bytes)
1716 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1720 void *p_data, unsigned int bytes)
1762 void *p_data, unsigned int bytes)
1774 write_vreg(vgpu, offset, p_data, bytes);
1821 unsigned int offset, void *p_data, unsigned int bytes)
1825 write_vreg(vgpu, offset, p_data, bytes);
1853 unsigned int offset, void *p_data, unsigned int bytes)
1857 write_vreg(vgpu, offset, p_data, bytes);
1871 unsigned int bytes)
1876 write_vreg(vgpu, offset, p_data, bytes);
3536 * @bytes: access data length
3542 void *p_data, unsigned int bytes)
3544 read_vreg(vgpu, offset, p_data, bytes);
3553 * @bytes: access data length
3559 void *p_data, unsigned int bytes)
3561 write_vreg(vgpu, offset, p_data, bytes);
3570 * @bytes: access data length
3576 void *p_data, unsigned int bytes)
3581 write_vreg(vgpu, offset, p_data, bytes);
3611 * @bytes: data length
3618 void *pdata, unsigned int bytes, bool is_read)
3627 if (drm_WARN_ON(&i915->drm, bytes > 8))
3637 return func(vgpu, offset, pdata, bytes);
3646 gvt_dbg_mmio("untracked MMIO %08x len %d\n", offset, bytes);
3651 return mmio_info->read(vgpu, offset, pdata, bytes);
3662 ret = mmio_info->write(vgpu, offset, pdata, bytes);
3668 memcpy(&data, pdata, bytes);
3671 ret = mmio_info->write(vgpu, offset, &data, bytes);
3687 intel_vgpu_default_mmio_read(vgpu, offset, pdata, bytes) :
3688 intel_vgpu_default_mmio_write(vgpu, offset, pdata, bytes);