Lines Matching refs:gvt
175 struct intel_gvt *gvt;
184 /* Both sched_data and sched_ctl can be seen a part of the global gvt
296 /* scheduler scope lock, protect gvt and vgpu schedule related data */
320 * use it with atomic bit ops so that no need to use gvt big lock.
338 return i915->gvt;
351 static inline void intel_gvt_request_service(struct intel_gvt *gvt,
354 set_bit(service, (void *)&gvt->service_request);
355 wake_up(&gvt->service_thread_wq);
358 void intel_gvt_free_firmware(struct intel_gvt *gvt);
359 int intel_gvt_load_firmware(struct intel_gvt *gvt);
369 #define gvt_to_ggtt(gvt) ((gvt)->gt->ggtt)
372 #define gvt_aperture_sz(gvt) gvt_to_ggtt(gvt)->mappable_end
373 #define gvt_aperture_pa_base(gvt) gvt_to_ggtt(gvt)->gmadr.start
375 #define gvt_ggtt_gm_sz(gvt) gvt_to_ggtt(gvt)->vm.total
376 #define gvt_ggtt_sz(gvt) (gvt_to_ggtt(gvt)->vm.total >> PAGE_SHIFT << 3)
377 #define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))
379 #define gvt_aperture_gmadr_base(gvt) (0)
380 #define gvt_aperture_gmadr_end(gvt) (gvt_aperture_gmadr_base(gvt) \
381 + gvt_aperture_sz(gvt) - 1)
383 #define gvt_hidden_gmadr_base(gvt) (gvt_aperture_gmadr_base(gvt) \
384 + gvt_aperture_sz(gvt))
385 #define gvt_hidden_gmadr_end(gvt) (gvt_hidden_gmadr_base(gvt) \
386 + gvt_hidden_sz(gvt) - 1)
388 #define gvt_fence_sz(gvt) (gvt_to_ggtt(gvt)->num_fences)
397 (gvt_aperture_pa_base(vgpu->gvt) + vgpu_aperture_offset(vgpu))
445 #define for_each_active_vgpu(gvt, vgpu, id) \
446 idr_for_each_entry((&(gvt)->vgpu_idr), (vgpu), (id)) \
469 int intel_gvt_init_vgpu_types(struct intel_gvt *gvt);
470 void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt);
472 struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt);
474 struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
497 #define gvt_gmadr_is_aperture(gvt, gmadr) \
498 ((gmadr >= gvt_aperture_gmadr_base(gvt)) && \
499 (gmadr <= gvt_aperture_gmadr_end(gvt)))
501 #define gvt_gmadr_is_hidden(gvt, gmadr) \
502 ((gmadr >= gvt_hidden_gmadr_base(gvt)) && \
503 (gmadr <= gvt_hidden_gmadr_end(gvt)))
505 #define gvt_gmadr_is_valid(gvt, gmadr) \
506 (gvt_gmadr_is_aperture(gvt, gmadr) || \
507 gvt_gmadr_is_hidden(gvt, gmadr))
562 struct intel_vgpu_type *(*gvt_find_vgpu_type)(struct intel_gvt *gvt,
591 * @gvt: a GVT device
596 struct intel_gvt *gvt, unsigned int offset)
598 gvt->mmio.mmio_attribute[offset >> 2] |= F_ACCESSED;
603 * @gvt: a GVT device
610 struct intel_gvt *gvt, unsigned int offset)
612 return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_ACCESS;
618 * @gvt: a GVT device
623 struct intel_gvt *gvt, unsigned int offset)
625 gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_ACCESS;
630 * @gvt: a GVT device
635 struct intel_gvt *gvt, unsigned int offset)
637 return gvt->mmio.mmio_attribute[offset >> 2] & F_UNALIGN;
642 * @gvt: a GVT device
650 struct intel_gvt *gvt, unsigned int offset)
652 return gvt->mmio.mmio_attribute[offset >> 2] & F_MODE_MASK;
658 * @gvt: a GVT device
666 struct intel_gvt *gvt, unsigned int offset)
668 return gvt->mmio.mmio_attribute[offset >> 2] & F_SR_IN_CTX;
675 * @gvt: a GVT device
680 struct intel_gvt *gvt, unsigned int offset)
682 gvt->mmio.mmio_attribute[offset >> 2] |= F_SR_IN_CTX;
687 void intel_gvt_debugfs_init(struct intel_gvt *gvt);
688 void intel_gvt_debugfs_clean(struct intel_gvt *gvt);
690 int intel_gvt_pm_resume(struct intel_gvt *gvt);