Lines Matching refs:hdata
668 static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
671 return hdmi_reg_map[reg_id & 0xffff][hdata->drv_data->type];
675 static inline u32 hdmi_reg_read(struct hdmi_context *hdata, u32 reg_id)
677 return readl(hdata->regs + hdmi_map_reg(hdata, reg_id));
680 static inline void hdmi_reg_writeb(struct hdmi_context *hdata,
683 writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
686 static inline void hdmi_reg_writev(struct hdmi_context *hdata, u32 reg_id,
689 reg_id = hdmi_map_reg(hdata, reg_id);
692 writel(val & 0xff, hdata->regs + reg_id);
698 static inline void hdmi_reg_write_buf(struct hdmi_context *hdata, u32 reg_id,
701 for (reg_id = hdmi_map_reg(hdata, reg_id); size; --size, reg_id += 4)
702 writel(*buf++, hdata->regs + reg_id);
705 static inline void hdmi_reg_writemask(struct hdmi_context *hdata,
710 reg_id = hdmi_map_reg(hdata, reg_id);
711 old = readl(hdata->regs + reg_id);
713 writel(value, hdata->regs + reg_id);
716 static int hdmiphy_reg_write_buf(struct hdmi_context *hdata,
722 if (hdata->hdmiphy_port) {
725 ret = i2c_master_send(hdata->hdmiphy_port, buf, len);
732 writel(buf[i], hdata->regs_hdmiphy +
738 static int hdmi_clk_enable_gates(struct hdmi_context *hdata)
742 for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
743 ret = clk_prepare_enable(hdata->clk_gates[i]);
747 dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",
748 hdata->drv_data->clk_gates.data[i], ret);
750 clk_disable_unprepare(hdata->clk_gates[i]);
757 static void hdmi_clk_disable_gates(struct hdmi_context *hdata)
759 int i = hdata->drv_data->clk_gates.count;
762 clk_disable_unprepare(hdata->clk_gates[i]);
765 static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy)
767 struct device *dev = hdata->dev;
771 for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
772 struct clk **c = &hdata->clk_muxes[i];
779 hdata->drv_data->clk_muxes.data[i + 2],
780 hdata->drv_data->clk_muxes.data[i + to_phy], ret);
786 static int hdmi_audio_infoframe_apply(struct hdmi_context *hdata)
788 struct hdmi_audio_infoframe *infoframe = &hdata->audio.infoframe;
796 hdmi_reg_writeb(hdata, HDMI_AUI_CON, HDMI_AUI_CON_EVERY_VSYNC);
797 hdmi_reg_write_buf(hdata, HDMI_AUI_HEADER0, buf, len);
802 static void hdmi_reg_infoframes(struct hdmi_context *hdata)
804 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
809 if (hdata->dvi_mode) {
810 hdmi_reg_writeb(hdata, HDMI_AVI_CON,
812 hdmi_reg_writeb(hdata, HDMI_VSI_CON,
814 hdmi_reg_writeb(hdata, HDMI_AUI_CON, HDMI_AUI_CON_NO_TRAN);
819 &hdata->connector, m);
823 hdmi_reg_writeb(hdata, HDMI_AVI_CON, HDMI_AVI_CON_EVERY_VSYNC);
824 hdmi_reg_write_buf(hdata, HDMI_AVI_HEADER0, buf, ret);
830 &hdata->connector, m);
835 hdmi_reg_writeb(hdata, HDMI_VSI_CON, HDMI_VSI_CON_EVERY_VSYNC);
836 hdmi_reg_write_buf(hdata, HDMI_VSI_HEADER0, buf, 3);
837 hdmi_reg_write_buf(hdata, HDMI_VSI_DATA(0), buf + 3, ret - 3);
840 hdmi_audio_infoframe_apply(hdata);
846 struct hdmi_context *hdata = connector_to_hdmi(connector);
848 if (gpiod_get_value(hdata->hpd_gpio))
851 cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID);
857 struct hdmi_context *hdata = connector_to_hdmi(connector);
859 cec_notifier_conn_unregister(hdata->notifier);
876 struct hdmi_context *hdata = connector_to_hdmi(connector);
880 if (!hdata->ddc_adpt)
883 edid = drm_get_edid(connector, hdata->ddc_adpt);
887 hdata->dvi_mode = !drm_detect_hdmi_monitor(edid);
888 DRM_DEV_DEBUG_KMS(hdata->dev, "%s : width[%d] x height[%d]\n",
889 (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
893 cec_notifier_set_phys_addr_from_edid(hdata->notifier, edid);
902 static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
904 const struct hdmiphy_configs *confs = &hdata->drv_data->phy_confs;
911 DRM_DEV_DEBUG_KMS(hdata->dev, "Could not find phy config for %d\n",
919 struct hdmi_context *hdata = connector_to_hdmi(connector);
922 DRM_DEV_DEBUG_KMS(hdata->dev,
929 ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
943 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
944 struct drm_connector *connector = &hdata->connector;
951 ret = drm_connector_init_with_ddc(hdata->drm_dev, connector,
954 hdata->ddc_adpt);
956 DRM_DEV_ERROR(hdata->dev,
964 if (hdata->bridge) {
965 ret = drm_bridge_attach(encoder, hdata->bridge, NULL, 0);
967 DRM_DEV_ERROR(hdata->dev, "Failed to attach bridge\n");
972 hdata->notifier = cec_notifier_conn_register(hdata->dev, NULL,
974 if (!hdata->notifier) {
976 DRM_DEV_ERROR(hdata->dev, "Failed to allocate CEC notifier\n");
1037 static void hdmi_reg_acr(struct hdmi_context *hdata, u32 freq)
1044 hdmi_reg_writev(hdata, HDMI_ACR_N0, 3, n);
1045 hdmi_reg_writev(hdata, HDMI_ACR_MCTS0, 3, cts);
1046 hdmi_reg_writev(hdata, HDMI_ACR_CTS0, 3, cts);
1047 hdmi_reg_writeb(hdata, HDMI_ACR_CON, 4);
1050 static void hdmi_audio_config(struct hdmi_context *hdata)
1056 switch (hdata->audio.params.sample_width) {
1069 hdmi_reg_acr(hdata, hdata->audio.params.sample_rate);
1071 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CON, HDMI_I2S_IN_DISABLE
1075 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CH, HDMI_I2S_CH0_EN
1078 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CUV, HDMI_I2S_CUV_RL_EN);
1079 hdmi_reg_writeb(hdata, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_DIS);
1080 hdmi_reg_writeb(hdata, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_EN);
1082 val = hdmi_reg_read(hdata, HDMI_I2S_DSD_CON) | 0x01;
1083 hdmi_reg_writeb(hdata, HDMI_I2S_DSD_CON, val);
1086 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_0, HDMI_I2S_SEL_SCLK(5)
1089 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(3)
1092 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_2, HDMI_I2S_SEL_SDATA3(1)
1095 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_3, HDMI_I2S_SEL_DSD(0));
1098 hdmi_reg_writeb(hdata, HDMI_I2S_CON_1, HDMI_I2S_SCLK_FALLING_EDGE
1100 hdmi_reg_writeb(hdata, HDMI_I2S_CON_2, HDMI_I2S_MSB_FIRST_MODE
1107 hdmi_reg_writeb(hdata, HDMI_I2S_CH_ST(i),
1108 hdata->audio.params.iec.status[i]);
1110 hdmi_reg_writeb(hdata, HDMI_I2S_CH_ST_CON, HDMI_I2S_CH_STATUS_RELOAD);
1113 static void hdmi_audio_control(struct hdmi_context *hdata)
1115 bool enable = !hdata->audio.mute;
1117 if (hdata->dvi_mode)
1120 hdmi_reg_writeb(hdata, HDMI_AUI_CON, enable ?
1122 hdmi_reg_writemask(hdata, HDMI_CON_0, enable ?
1126 static void hdmi_start(struct hdmi_context *hdata, bool start)
1128 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1134 hdmi_reg_writemask(hdata, HDMI_CON_0, val, HDMI_EN);
1135 hdmi_reg_writemask(hdata, HDMI_TG_CMD, val, HDMI_TG_EN | HDMI_FIELD_EN);
1138 static void hdmi_conf_init(struct hdmi_context *hdata)
1141 hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL |
1145 hdmi_reg_writemask(hdata, HDMI_MODE_SEL,
1148 hdmi_reg_writeb(hdata, HDMI_CON_2, 0);
1150 hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_BLUE_SCR_EN);
1152 if (hdata->dvi_mode) {
1153 hdmi_reg_writemask(hdata, HDMI_MODE_SEL,
1155 hdmi_reg_writeb(hdata, HDMI_CON_2,
1159 if (hdata->drv_data->type == HDMI_TYPE13) {
1161 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_0, 0x12);
1162 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_1, 0x34);
1163 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_2, 0x56);
1166 hdmi_reg_writeb(hdata, HDMI_V13_AVI_CON, 0x02);
1168 hdmi_reg_writeb(hdata, HDMI_V13_AVI_BYTE(0), 0 << 5);
1169 hdmi_reg_writemask(hdata, HDMI_CON_1, 0x10 << 5, 0x11 << 5);
1171 hdmi_reg_writeb(hdata, HDMI_V13_SPD_CON, 0x02);
1172 hdmi_reg_writeb(hdata, HDMI_V13_AUI_CON, 0x02);
1173 hdmi_reg_writeb(hdata, HDMI_V13_ACR_CON, 0x04);
1175 hdmi_reg_infoframes(hdata);
1178 hdmi_reg_writemask(hdata, HDMI_CON_1, 2, 3 << 5);
1182 static void hdmiphy_wait_for_pll(struct hdmi_context *hdata)
1187 u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
1190 DRM_DEV_DEBUG_KMS(hdata->dev,
1198 DRM_DEV_ERROR(hdata->dev, "PLL could not reach steady state\n");
1201 static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
1203 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1206 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1207 hdmi_reg_writev(hdata, HDMI_V13_H_V_LINE_0, 3,
1211 hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1, val);
1214 hdmi_reg_writev(hdata, HDMI_INT_PRO_MODE, 1, val);
1219 hdmi_reg_writev(hdata, HDMI_V13_H_SYNC_GEN_0, 3, val);
1231 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_1_0, 3, val);
1235 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_0, 3, val);
1240 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_F_0, 3, val);
1244 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_2_0, 3, val);
1249 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_3_0, 3, val);
1251 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1253 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1255 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x249);
1259 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_0, 3, val);
1261 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_F_0, 3, 0);
1265 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_1_0, 3, val);
1267 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_2_0, 3, 0x1001);
1268 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_3_0, 3, 0x1001);
1269 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1271 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1274 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1275 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay);
1276 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay);
1277 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1280 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
1282 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1284 &hdata->encoder.crtc->state->adjusted_mode;
1296 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1297 hdmi_reg_writev(hdata, HDMI_V_LINE_0, 2, m->vtotal);
1298 hdmi_reg_writev(hdata, HDMI_H_LINE_0, 2, m->htotal);
1299 hdmi_reg_writev(hdata, HDMI_HSYNC_POL, 1,
1301 hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1,
1303 hdmi_reg_writev(hdata, HDMI_INT_PRO_MODE, 1,
1314 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2,
1316 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2,
1318 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal / 2);
1319 hdmi_reg_writev(hdata, HDMI_V1_BLANK_0, 2,
1321 hdmi_reg_writev(hdata, HDMI_V_BLANK_F0_0, 2,
1323 hdmi_reg_writev(hdata, HDMI_V_BLANK_F1_0, 2, m->vtotal);
1324 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_2_0, 2,
1326 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_1_0, 2,
1328 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_2_0, 2,
1330 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_1_0, 2,
1332 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1334 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1335 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2,
1337 hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2,
1339 hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2,
1341 hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2,
1343 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST3_L, 2, 0x0);
1344 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST4_L, 2, 0x0);
1346 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2,
1348 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2,
1350 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal);
1351 hdmi_reg_writev(hdata, HDMI_V1_BLANK_0, 2,
1353 hdmi_reg_writev(hdata, HDMI_V_BLANK_F0_0, 2, 0xffff);
1354 hdmi_reg_writev(hdata, HDMI_V_BLANK_F1_0, 2, 0xffff);
1355 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_2_0, 2, 0xffff);
1356 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_1_0, 2, 0xffff);
1357 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_2_0, 2, 0xffff);
1358 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_1_0, 2, 0xffff);
1359 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1361 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1364 hdmi_reg_writev(hdata, HDMI_H_SYNC_START_0, 2,
1366 hdmi_reg_writev(hdata, HDMI_H_SYNC_END_0, 2,
1368 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_1_0, 2, 0xffff);
1369 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_2_0, 2, 0xffff);
1370 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_3_0, 2, 0xffff);
1371 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_4_0, 2, 0xffff);
1372 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_5_0, 2, 0xffff);
1373 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_6_0, 2, 0xffff);
1374 hdmi_reg_writev(hdata, HDMI_V_BLANK_F2_0, 2, 0xffff);
1375 hdmi_reg_writev(hdata, HDMI_V_BLANK_F3_0, 2, 0xffff);
1376 hdmi_reg_writev(hdata, HDMI_V_BLANK_F4_0, 2, 0xffff);
1377 hdmi_reg_writev(hdata, HDMI_V_BLANK_F5_0, 2, 0xffff);
1378 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_3_0, 2, 0xffff);
1379 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_4_0, 2, 0xffff);
1380 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_5_0, 2, 0xffff);
1381 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_6_0, 2, 0xffff);
1382 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_3_0, 2, 0xffff);
1383 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_4_0, 2, 0xffff);
1384 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_5_0, 2, 0xffff);
1385 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_6_0, 2, 0xffff);
1387 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1388 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2,
1390 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay + hquirk);
1391 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1392 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1393 hdmi_reg_writeb(hdata, HDMI_TG_DECON_EN, 1);
1396 static void hdmi_mode_apply(struct hdmi_context *hdata)
1398 if (hdata->drv_data->type == HDMI_TYPE13)
1399 hdmi_v13_mode_apply(hdata);
1401 hdmi_v14_mode_apply(hdata);
1403 hdmi_start(hdata, true);
1406 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
1408 hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, 0, 1);
1410 hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, ~0, 1);
1412 hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
1414 hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT);
1418 static void hdmiphy_enable_mode_set(struct hdmi_context *hdata, bool enable)
1422 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1423 writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE);
1426 static void hdmiphy_conf_apply(struct hdmi_context *hdata)
1428 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1432 ret = hdmi_find_phy_conf(hdata, m->clock * 1000);
1434 DRM_DEV_ERROR(hdata->dev, "failed to find hdmiphy conf\n");
1437 phy_conf = hdata->drv_data->phy_confs.data[ret].conf;
1439 hdmi_clk_set_parents(hdata, false);
1441 hdmiphy_conf_reset(hdata);
1443 hdmiphy_enable_mode_set(hdata, true);
1444 ret = hdmiphy_reg_write_buf(hdata, 0, phy_conf, 32);
1446 DRM_DEV_ERROR(hdata->dev, "failed to configure hdmiphy\n");
1449 hdmiphy_enable_mode_set(hdata, false);
1450 hdmi_clk_set_parents(hdata, true);
1452 hdmiphy_wait_for_pll(hdata);
1455 /* Should be called with hdata->mutex mutex held */
1456 static void hdmi_conf_apply(struct hdmi_context *hdata)
1458 hdmi_start(hdata, false);
1459 hdmi_conf_init(hdata);
1460 hdmi_audio_config(hdata);
1461 hdmi_mode_apply(hdata);
1462 hdmi_audio_control(hdata);
1465 static void hdmi_set_refclk(struct hdmi_context *hdata, bool on)
1467 if (!hdata->sysreg)
1470 regmap_update_bits(hdata->sysreg, EXYNOS5433_SYSREG_DISP_HDMI_PHY,
1474 /* Should be called with hdata->mutex mutex held. */
1475 static void hdmiphy_enable(struct hdmi_context *hdata)
1477 if (hdata->powered)
1480 pm_runtime_get_sync(hdata->dev);
1482 if (regulator_bulk_enable(ARRAY_SIZE(supply), hdata->regul_bulk))
1483 DRM_DEV_DEBUG_KMS(hdata->dev,
1486 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1489 hdmi_set_refclk(hdata, true);
1491 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN);
1493 hdmiphy_conf_apply(hdata);
1495 hdata->powered = true;
1498 /* Should be called with hdata->mutex mutex held. */
1499 static void hdmiphy_disable(struct hdmi_context *hdata)
1501 if (!hdata->powered)
1504 hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
1506 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN);
1508 hdmi_set_refclk(hdata, false);
1510 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1513 regulator_bulk_disable(ARRAY_SIZE(supply), hdata->regul_bulk);
1515 pm_runtime_put_sync(hdata->dev);
1517 hdata->powered = false;
1522 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
1524 mutex_lock(&hdata->mutex);
1526 hdmiphy_enable(hdata);
1527 hdmi_conf_apply(hdata);
1529 mutex_unlock(&hdata->mutex);
1534 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
1536 mutex_lock(&hdata->mutex);
1538 if (hdata->powered) {
1548 mutex_unlock(&hdata->mutex);
1549 cancel_delayed_work(&hdata->hotplug_work);
1550 if (hdata->notifier)
1551 cec_notifier_phys_addr_invalidate(hdata->notifier);
1555 mutex_unlock(&hdata->mutex);
1566 struct hdmi_context *hdata = dev_get_drvdata(dev);
1568 mutex_lock(&hdata->mutex);
1570 hdata->audio.mute = true;
1572 if (hdata->powered)
1573 hdmi_audio_control(hdata);
1575 mutex_unlock(&hdata->mutex);
1582 struct hdmi_context *hdata = dev_get_drvdata(dev);
1594 mutex_lock(&hdata->mutex);
1596 hdata->audio.params = *params;
1598 if (hdata->powered) {
1599 hdmi_audio_config(hdata);
1600 hdmi_audio_infoframe_apply(hdata);
1603 mutex_unlock(&hdata->mutex);
1611 struct hdmi_context *hdata = dev_get_drvdata(dev);
1613 mutex_lock(&hdata->mutex);
1615 hdata->audio.mute = mute;
1617 if (hdata->powered)
1618 hdmi_audio_control(hdata);
1620 mutex_unlock(&hdata->mutex);
1628 struct hdmi_context *hdata = dev_get_drvdata(dev);
1629 struct drm_connector *connector = &hdata->connector;
1644 static int hdmi_register_audio_device(struct hdmi_context *hdata)
1652 hdata->audio.pdev = platform_device_register_data(
1653 hdata->dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
1656 return PTR_ERR_OR_ZERO(hdata->audio.pdev);
1661 struct hdmi_context *hdata;
1663 hdata = container_of(work, struct hdmi_context, hotplug_work.work);
1665 if (hdata->drm_dev)
1666 drm_helper_hpd_irq_event(hdata->drm_dev);
1671 struct hdmi_context *hdata = arg;
1673 mod_delayed_work(system_wq, &hdata->hotplug_work,
1679 static int hdmi_clks_get(struct hdmi_context *hdata,
1683 struct device *dev = hdata->dev;
1704 static int hdmi_clk_init(struct hdmi_context *hdata)
1706 const struct hdmi_driver_data *drv_data = hdata->drv_data;
1708 struct device *dev = hdata->dev;
1719 hdata->clk_gates = clks;
1720 hdata->clk_muxes = clks + drv_data->clk_gates.count;
1722 ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates);
1726 return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
1732 struct hdmi_context *hdata = container_of(clk, struct hdmi_context,
1734 mutex_lock(&hdata->mutex);
1737 hdmiphy_enable(hdata);
1739 hdmiphy_disable(hdata);
1741 mutex_unlock(&hdata->mutex);
1744 static int hdmi_bridge_init(struct hdmi_context *hdata)
1746 struct device *dev = hdata->dev;
1760 hdata->bridge = of_drm_find_bridge(np);
1763 if (!hdata->bridge)
1769 static int hdmi_resources_init(struct hdmi_context *hdata)
1771 struct device *dev = hdata->dev;
1776 hdata->hpd_gpio = devm_gpiod_get(dev, "hpd", GPIOD_IN);
1777 if (IS_ERR(hdata->hpd_gpio)) {
1779 return PTR_ERR(hdata->hpd_gpio);
1782 hdata->irq = gpiod_to_irq(hdata->hpd_gpio);
1783 if (hdata->irq < 0) {
1785 return hdata->irq;
1788 ret = hdmi_clk_init(hdata);
1792 ret = hdmi_clk_set_parents(hdata, false);
1797 hdata->regul_bulk[i].supply = supply[i];
1799 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(supply), hdata->regul_bulk);
1803 hdata->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en");
1805 if (PTR_ERR(hdata->reg_hdmi_en) != -ENODEV)
1806 if (IS_ERR(hdata->reg_hdmi_en))
1807 return PTR_ERR(hdata->reg_hdmi_en);
1809 return hdmi_bridge_init(hdata);
1834 struct hdmi_context *hdata = dev_get_drvdata(dev);
1835 struct drm_encoder *encoder = &hdata->encoder;
1839 hdata->drm_dev = drm_dev;
1841 hdata->phy_clk.enable = hdmiphy_clk_enable;
1854 crtc->pipe_clk = &hdata->phy_clk;
1876 static int hdmi_get_ddc_adapter(struct hdmi_context *hdata)
1886 np = of_parse_phandle(hdata->dev->of_node, "ddc", 0);
1889 DRM_DEV_ERROR(hdata->dev,
1902 hdata->ddc_adpt = adpt;
1907 static int hdmi_get_phy_io(struct hdmi_context *hdata)
1915 np = of_parse_phandle(hdata->dev->of_node, "phy", 0);
1917 DRM_DEV_ERROR(hdata->dev,
1923 if (hdata->drv_data->is_apb_phy) {
1924 hdata->regs_hdmiphy = of_iomap(np, 0);
1925 if (!hdata->regs_hdmiphy) {
1926 DRM_DEV_ERROR(hdata->dev,
1932 hdata->hdmiphy_port = of_find_i2c_device_by_node(np);
1933 if (!hdata->hdmiphy_port) {
1949 struct hdmi_context *hdata;
1953 hdata = devm_kzalloc(dev, sizeof(struct hdmi_context), GFP_KERNEL);
1954 if (!hdata)
1957 hdata->drv_data = of_device_get_match_data(dev);
1959 platform_set_drvdata(pdev, hdata);
1961 hdata->dev = dev;
1963 mutex_init(&hdata->mutex);
1965 ret = hdmi_resources_init(hdata);
1973 hdata->regs = devm_ioremap_resource(dev, res);
1974 if (IS_ERR(hdata->regs)) {
1975 ret = PTR_ERR(hdata->regs);
1979 ret = hdmi_get_ddc_adapter(hdata);
1983 ret = hdmi_get_phy_io(hdata);
1987 INIT_DELAYED_WORK(&hdata->hotplug_work, hdmi_hotplug_work_func);
1989 ret = devm_request_threaded_irq(dev, hdata->irq, NULL,
1992 "hdmi", hdata);
1998 hdata->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node,
2000 if (IS_ERR(hdata->pmureg)) {
2006 if (hdata->drv_data->has_sysreg) {
2007 hdata->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,
2009 if (IS_ERR(hdata->sysreg)) {
2016 if (!IS_ERR(hdata->reg_hdmi_en)) {
2017 ret = regulator_enable(hdata->reg_hdmi_en);
2027 audio_infoframe = &hdata->audio.infoframe;
2034 ret = hdmi_register_audio_device(hdata);
2045 platform_device_unregister(hdata->audio.pdev);
2049 if (!IS_ERR(hdata->reg_hdmi_en))
2050 regulator_disable(hdata->reg_hdmi_en);
2052 if (hdata->hdmiphy_port)
2053 put_device(&hdata->hdmiphy_port->dev);
2054 if (hdata->regs_hdmiphy)
2055 iounmap(hdata->regs_hdmiphy);
2057 put_device(&hdata->ddc_adpt->dev);
2064 struct hdmi_context *hdata = platform_get_drvdata(pdev);
2066 cancel_delayed_work_sync(&hdata->hotplug_work);
2069 platform_device_unregister(hdata->audio.pdev);
2073 if (!IS_ERR(hdata->reg_hdmi_en))
2074 regulator_disable(hdata->reg_hdmi_en);
2076 if (hdata->hdmiphy_port)
2077 put_device(&hdata->hdmiphy_port->dev);
2079 if (hdata->regs_hdmiphy)
2080 iounmap(hdata->regs_hdmiphy);
2082 put_device(&hdata->ddc_adpt->dev);
2084 mutex_destroy(&hdata->mutex);
2091 struct hdmi_context *hdata = dev_get_drvdata(dev);
2093 hdmi_clk_disable_gates(hdata);
2100 struct hdmi_context *hdata = dev_get_drvdata(dev);
2103 ret = hdmi_clk_enable_gates(hdata);