Lines Matching refs:gpu
18 u32 (*sample)(struct etnaviv_gpu *gpu,
40 static u32 perf_reg_read(struct etnaviv_gpu *gpu,
44 gpu_write(gpu, domain->profile_config, signal->data);
46 return gpu_read(gpu, domain->profile_read);
49 static u32 pipe_reg_read(struct etnaviv_gpu *gpu,
53 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
57 for (i = 0; i < gpu->identity.pixel_pipes; i++) {
60 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);
61 gpu_write(gpu, domain->profile_config, signal->data);
62 value += gpu_read(gpu, domain->profile_read);
68 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);
73 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu,
79 if (gpu->identity.model == chipModel_GC880 ||
80 gpu->identity.model == chipModel_GC2000 ||
81 gpu->identity.model == chipModel_GC2100)
84 return gpu_read(gpu, reg);
87 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu,
93 if (gpu->identity.model == chipModel_GC880 ||
94 gpu->identity.model == chipModel_GC2000 ||
95 gpu->identity.model == chipModel_GC2100)
98 return gpu_read(gpu, reg);
430 static unsigned int num_pm_domains(const struct etnaviv_gpu *gpu)
437 if (gpu->identity.features & meta->feature)
444 static const struct etnaviv_pm_domain *pm_domain(const struct etnaviv_gpu *gpu,
453 if (!(gpu->identity.features & meta->feature))
467 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu,
470 const unsigned int nr_domains = num_pm_domains(gpu);
476 dom = pm_domain(gpu, domain->iter);
491 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu,
494 const unsigned int nr_domains = num_pm_domains(gpu);
501 dom = pm_domain(gpu, signal->domain);
537 void etnaviv_perfmon_process(struct etnaviv_gpu *gpu,
548 val = sig->sample(gpu, dom, sig);