Lines Matching refs:idle
450 /* GC600/300 idle register reports zero bits where modules aren't present */
492 u32 control, idle;
529 /* read idle register. */
530 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
532 /* try resetting again if FE is not idle */
533 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) {
534 dev_dbg(gpu->dev, "FE is not idle\n");
541 /* is the GPU idle? */
544 dev_dbg(gpu->dev, "GPU is not idle\n");
557 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
561 idle & VIVS_HI_IDLE_STATE_FE ? "" : "not ",
879 u32 dma_lo, dma_hi, axi, idle;
891 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
955 seq_printf(m, "\tidle: 0x%08x\n", idle);
956 idle |= ~gpu->idle_mask & ~VIVS_HI_IDLE_STATE_AXI_LP;
957 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0)
958 seq_puts(m, "\t FE is not idle\n");
959 if ((idle & VIVS_HI_IDLE_STATE_DE) == 0)
960 seq_puts(m, "\t DE is not idle\n");
961 if ((idle & VIVS_HI_IDLE_STATE_PE) == 0)
962 seq_puts(m, "\t PE is not idle\n");
963 if ((idle & VIVS_HI_IDLE_STATE_SH) == 0)
964 seq_puts(m, "\t SH is not idle\n");
965 if ((idle & VIVS_HI_IDLE_STATE_PA) == 0)
966 seq_puts(m, "\t PA is not idle\n");
967 if ((idle & VIVS_HI_IDLE_STATE_SE) == 0)
968 seq_puts(m, "\t SE is not idle\n");
969 if ((idle & VIVS_HI_IDLE_STATE_RA) == 0)
970 seq_puts(m, "\t RA is not idle\n");
971 if ((idle & VIVS_HI_IDLE_STATE_TX) == 0)
972 seq_puts(m, "\t TX is not idle\n");
973 if ((idle & VIVS_HI_IDLE_STATE_VG) == 0)
974 seq_puts(m, "\t VG is not idle\n");
975 if ((idle & VIVS_HI_IDLE_STATE_IM) == 0)
976 seq_puts(m, "\t IM is not idle\n");
977 if ((idle & VIVS_HI_IDLE_STATE_FP) == 0)
978 seq_puts(m, "\t FP is not idle\n");
979 if ((idle & VIVS_HI_IDLE_STATE_TS) == 0)
980 seq_puts(m, "\t TS is not idle\n");
981 if ((idle & VIVS_HI_IDLE_STATE_BL) == 0)
982 seq_puts(m, "\t BL is not idle\n");
983 if ((idle & VIVS_HI_IDLE_STATE_ASYNCFE) == 0)
984 seq_puts(m, "\t ASYNCFE is not idle\n");
985 if ((idle & VIVS_HI_IDLE_STATE_MC) == 0)
986 seq_puts(m, "\t MC is not idle\n");
987 if ((idle & VIVS_HI_IDLE_STATE_PPA) == 0)
988 seq_puts(m, "\t PPA is not idle\n");
989 if ((idle & VIVS_HI_IDLE_STATE_WD) == 0)
990 seq_puts(m, "\t WD is not idle\n");
991 if ((idle & VIVS_HI_IDLE_STATE_NN) == 0)
992 seq_puts(m, "\t NN is not idle\n");
993 if ((idle & VIVS_HI_IDLE_STATE_TP) == 0)
994 seq_puts(m, "\t TP is not idle\n");
995 if (idle & VIVS_HI_IDLE_STATE_AXI_LP)
1558 u32 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
1560 if ((idle & gpu->idle_mask) == gpu->idle_mask)
1565 "timed out waiting for idle: idle=0x%x\n",
1566 idle);
1855 u32 idle, mask;
1857 /* If there are any jobs in the HW queue, we're not idle */
1861 /* Check whether the hardware (except FE and MC) is idle */
1864 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE) & mask;
1865 if (idle != mask) {
1866 dev_warn_ratelimited(dev, "GPU not yet idle, mask: 0x%08x\n",
1867 idle);