Lines Matching refs:tc
283 struct tc_data *tc = bridge_to_tc(bridge);
284 struct device *dev = &tc->dsi->dev;
287 ret = regulator_enable(tc->vddio);
292 ret = regulator_enable(tc->vdd);
297 gpiod_set_value(tc->stby_gpio, 0);
300 gpiod_set_value(tc->reset_gpio, 0);
306 struct tc_data *tc = bridge_to_tc(bridge);
307 struct device *dev = &tc->dsi->dev;
310 gpiod_set_value(tc->reset_gpio, 1);
313 gpiod_set_value(tc->stby_gpio, 1);
316 ret = regulator_disable(tc->vdd);
321 ret = regulator_disable(tc->vddio);
377 struct tc_data *tc = bridge_to_tc(bridge);
403 d2l_read(tc->i2c, IDREG, &val);
405 dev_info(tc->dev, "DSI2LVDS Chip ID.%02x Revision ID. %02x **\n",
408 d2l_write(tc->i2c, SYSRST, SYS_RST_REG | SYS_RST_DSIRX | SYS_RST_BM |
412 d2l_write(tc->i2c, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
413 d2l_write(tc->i2c, PPI_LPTXTIMECNT, LPX_PERIOD);
414 d2l_write(tc->i2c, PPI_D0S_CLRSIPOCOUNT, 3);
415 d2l_write(tc->i2c, PPI_D1S_CLRSIPOCOUNT, 3);
416 d2l_write(tc->i2c, PPI_D2S_CLRSIPOCOUNT, 3);
417 d2l_write(tc->i2c, PPI_D3S_CLRSIPOCOUNT, 3);
419 val = ((L0EN << tc->num_dsi_lanes) - L0EN) | DSI_CLEN_BIT;
420 d2l_write(tc->i2c, PPI_LANEENABLE, val);
421 d2l_write(tc->i2c, DSI_LANEENABLE, val);
423 d2l_write(tc->i2c, PPI_STARTPPI, PPI_START_FUNCTION);
424 d2l_write(tc->i2c, DSI_STARTDSI, DSI_RX_START);
426 if (tc->bpc == 8)
431 dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
432 clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link;
434 t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
436 t3 = ((t2 * byteclk) / 100) - (hactive * (tc->bpc * 3 / 8) /
437 tc->num_dsi_lanes);
442 d2l_write(tc->i2c, VPCTRL, val);
444 d2l_write(tc->i2c, HTIM1, htime1);
445 d2l_write(tc->i2c, VTIM1, vtime1);
446 d2l_write(tc->i2c, HTIM2, htime2);
447 d2l_write(tc->i2c, VTIM2, vtime2);
449 d2l_write(tc->i2c, VFUEN, VFUEN_EN);
450 d2l_write(tc->i2c, SYSRST, SYS_RST_LCD);
451 d2l_write(tc->i2c, LVPHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_ND(6));
453 dev_dbg(tc->dev, "bus_formats %04x bpc %d\n",
455 tc->bpc);
463 d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));
464 d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0));
465 d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7));
466 d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));
467 d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2));
468 d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));
469 d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6));
471 d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));
472 d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0));
473 d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0));
474 d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));
475 d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2));
476 d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));
477 d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0));
480 d2l_write(tc->i2c, VFUEN, VFUEN_EN);
483 if (tc->lvds_link == DUAL_LINK) {
489 d2l_write(tc->i2c, LVCFG, val);
497 struct tc_data *tc = bridge_to_tc(bridge);
503 if ((mode->clock > 135000 && tc->lvds_link == SINGLE_LINK) ||
504 (mode->clock > 270000 && tc->lvds_link == DUAL_LINK))
511 tc->bpc = 8;
515 tc->bpc = 6;
518 dev_warn(tc->dev,
527 static int tc358775_parse_dt(struct device_node *np, struct tc_data *tc)
539 endpoint = of_graph_get_endpoint_by_regs(tc->dev->of_node,
554 dev_err(tc->dev,
562 tc->num_dsi_lanes = len / sizeof(u32);
564 if (tc->num_dsi_lanes < 1 || tc->num_dsi_lanes > 4)
567 tc->host_node = of_graph_get_remote_node(np, 0, 0);
568 if (!tc->host_node)
571 of_node_put(tc->host_node);
573 tc->lvds_link = SINGLE_LINK;
574 endpoint = of_graph_get_endpoint_by_regs(tc->dev->of_node,
582 tc->lvds_link = DUAL_LINK;
587 dev_dbg(tc->dev, "no.of dsi lanes: %d\n", tc->num_dsi_lanes);
588 dev_dbg(tc->dev, "operating in %d-link mode\n", tc->lvds_link);
596 struct tc_data *tc = bridge_to_tc(bridge);
597 struct device *dev = &tc->i2c->dev;
607 host = of_find_mipi_dsi_host_by_node(tc->host_node);
620 tc->dsi = dsi;
622 dsi->lanes = tc->num_dsi_lanes;
633 return drm_bridge_attach(bridge->encoder, tc->panel_bridge,
634 &tc->bridge, flags);
653 struct tc_data *tc;
656 tc = devm_kzalloc(dev, sizeof(*tc), GFP_KERNEL);
657 if (!tc)
660 tc->dev = dev;
661 tc->i2c = client;
670 tc->panel_bridge = devm_drm_panel_bridge_add(dev, panel);
671 if (IS_ERR(tc->panel_bridge))
672 return PTR_ERR(tc->panel_bridge);
674 ret = tc358775_parse_dt(dev->of_node, tc);
678 tc->vddio = devm_regulator_get(dev, "vddio-supply");
679 if (IS_ERR(tc->vddio)) {
680 ret = PTR_ERR(tc->vddio);
685 tc->vdd = devm_regulator_get(dev, "vdd-supply");
686 if (IS_ERR(tc->vdd)) {
687 ret = PTR_ERR(tc->vdd);
692 tc->stby_gpio = devm_gpiod_get(dev, "stby", GPIOD_OUT_HIGH);
693 if (IS_ERR(tc->stby_gpio)) {
694 ret = PTR_ERR(tc->stby_gpio);
699 tc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
700 if (IS_ERR(tc->reset_gpio)) {
701 ret = PTR_ERR(tc->reset_gpio);
706 tc->bridge.funcs = &tc_bridge_funcs;
707 tc->bridge.of_node = dev->of_node;
708 drm_bridge_add(&tc->bridge);
710 i2c_set_clientdata(client, tc);
717 struct tc_data *tc = i2c_get_clientdata(client);
719 drm_bridge_remove(&tc->bridge);