Lines Matching refs:ret
306 int ret, count = ALIGN(size, sizeof(u32));
310 ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count);
311 if (ret)
312 return ret;
320 int ret, count = ALIGN(size, sizeof(u32));
322 ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count);
323 if (ret)
324 return ret;
350 int ret;
352 ret = tc_aux_wait_busy(tc);
353 if (ret)
354 return ret;
363 ret = tc_aux_write_data(tc, msg->buffer, size);
364 if (ret < 0)
365 return ret;
373 ret = regmap_write(tc->regmap, DP0_AUXADDR, msg->address);
374 if (ret)
375 return ret;
377 ret = regmap_write(tc->regmap, DP0_AUXCFG0, tc_auxcfg0(msg, size));
378 if (ret)
379 return ret;
381 ret = tc_aux_wait_busy(tc);
382 if (ret)
383 return ret;
385 ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &auxstatus);
386 if (ret)
387 return ret;
451 int ret;
453 ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN);
454 if (ret)
455 return ret;
465 int ret;
544 ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN);
545 if (ret)
546 return ret;
555 ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam);
556 if (ret)
557 return ret;
618 int ret;
622 ret = tc_set_syspllparam(tc);
623 if (ret)
626 ret = regmap_write(tc->regmap, DP_PHY_CTRL,
628 if (ret)
634 ret = tc_pllupdate(tc, DP0_PLLCTRL);
635 if (ret)
638 ret = tc_pllupdate(tc, DP1_PLLCTRL);
639 if (ret)
642 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 100, 100000);
643 if (ret == -ETIMEDOUT) {
645 return ret;
646 } else if (ret) {
655 ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1);
656 if (ret)
661 dev_err(tc->dev, "tc_aux_link_setup failed: %d\n", ret);
662 return ret;
669 int ret;
673 ret = drm_dp_dpcd_read(&tc->aux, DP_DPCD_REV, tc->link.dpcd,
675 if (ret < 0)
696 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, ®);
697 if (ret < 0)
701 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, ®);
702 if (ret < 0)
707 ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, ®);
708 if (ret < 0)
727 dev_err(tc->dev, "failed to read DPCD: %d\n", ret);
728 return ret;
734 int ret;
774 ret = regmap_write(tc->regmap, VPCTRL0,
777 if (ret)
778 return ret;
780 ret = regmap_write(tc->regmap, HTIM01,
783 if (ret)
784 return ret;
786 ret = regmap_write(tc->regmap, HTIM02,
789 if (ret)
790 return ret;
792 ret = regmap_write(tc->regmap, VTIM01,
795 if (ret)
796 return ret;
798 ret = regmap_write(tc->regmap, VTIM02,
801 if (ret)
802 return ret;
804 ret = regmap_write(tc->regmap, VFUEN0, VFUEN); /* update settings */
805 if (ret)
806 return ret;
809 ret = regmap_write(tc->regmap, TSTCTL,
815 if (ret)
816 return ret;
820 ret = regmap_write(tc->regmap, DP0_VIDSYNCDELAY,
824 ret = regmap_write(tc->regmap, DP0_TOTALVAL,
827 if (ret)
828 return ret;
830 ret = regmap_write(tc->regmap, DP0_STARTVAL,
833 if (ret)
834 return ret;
836 ret = regmap_write(tc->regmap, DP0_ACTIVEVAL,
839 if (ret)
840 return ret;
851 ret = regmap_write(tc->regmap, DP0_SYNCVAL, dp0_syncval);
852 if (ret)
853 return ret;
855 ret = regmap_write(tc->regmap, DPIPXLFMT,
859 if (ret)
860 return ret;
862 ret = regmap_write(tc->regmap, DP0_MISC,
866 if (ret)
867 return ret;
875 int ret;
877 ret = tc_poll_timeout(tc, DP0_LTSTAT, LT_LOOPDONE,
879 if (ret) {
881 return ret;
884 ret = regmap_read(tc->regmap, DP0_LTSTAT, &value);
885 if (ret)
886 return ret;
897 int ret;
902 ret = regmap_read(tc->regmap, DP0CTL, &value);
903 if (ret)
904 return ret;
907 ret = regmap_write(tc->regmap, DP0CTL, 0);
908 if (ret)
909 return ret;
912 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc));
913 if (ret)
914 return ret;
916 ret = regmap_write(tc->regmap, DP1_SRCCTRL,
919 if (ret)
920 return ret;
922 ret = tc_set_syspllparam(tc);
923 if (ret)
924 return ret;
931 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl);
932 if (ret)
933 return ret;
936 ret = tc_pllupdate(tc, DP0_PLLCTRL);
937 if (ret)
938 return ret;
940 ret = tc_pllupdate(tc, DP1_PLLCTRL);
941 if (ret)
942 return ret;
946 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl);
949 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl);
951 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 500, 100000);
952 if (ret) {
954 return ret;
958 ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8);
959 if (ret)
960 return ret;
974 ret = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, tmp[0]);
975 if (ret < 0)
978 ret = drm_dp_dpcd_readb(aux, DP_EDP_CONFIGURATION_SET, tmp);
979 if (ret < 0)
997 ret = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, tmp, 2);
998 if (ret < 0)
1005 ret = drm_dp_dpcd_write(aux, DP_DOWNSPREAD_CTRL, tmp, 2);
1006 if (ret < 0)
1012 ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2);
1013 if (ret < 0)
1019 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL,
1022 if (ret)
1023 return ret;
1025 ret = regmap_write(tc->regmap, DP0_LTLOOPCTRL,
1029 if (ret)
1030 return ret;
1032 ret = regmap_write(tc->regmap, DP0_SRCCTRL,
1036 if (ret)
1037 return ret;
1040 ret = regmap_write(tc->regmap, DP0CTL,
1043 if (ret)
1044 return ret;
1048 ret = tc_wait_link_training(tc);
1049 if (ret < 0)
1050 return ret;
1052 if (ret) {
1054 training_pattern1_errors[ret]);
1061 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL,
1064 if (ret)
1065 return ret;
1067 ret = regmap_write(tc->regmap, DP0_SRCCTRL,
1071 if (ret)
1072 return ret;
1075 ret = tc_wait_link_training(tc);
1076 if (ret < 0)
1077 return ret;
1079 if (ret) {
1081 training_pattern2_errors[ret]);
1095 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc) |
1097 if (ret)
1098 return ret;
1103 ret = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, tmp[0]);
1104 if (ret < 0)
1108 ret = drm_dp_dpcd_read_link_status(aux, tmp);
1109 if (ret < 0)
1112 ret = 0;
1118 ret = -ENODEV;
1126 ret = -ENODEV;
1131 ret = -ENODEV;
1135 if (ret) {
1142 return ret;
1147 dev_err(tc->dev, "Failed to read DPCD: %d\n", ret);
1148 return ret;
1150 dev_err(tc->dev, "Failed to write DPCD: %d\n", ret);
1151 return ret;
1156 int ret;
1160 ret = regmap_write(tc->regmap, DP0_SRCCTRL, 0);
1161 if (ret)
1162 return ret;
1169 int ret;
1176 ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk),
1178 if (ret)
1179 return ret;
1182 ret = tc_set_video_mode(tc, &tc->mode);
1183 if (ret)
1184 return ret;
1187 ret = tc_stream_clock_calc(tc);
1188 if (ret)
1189 return ret;
1194 ret = regmap_write(tc->regmap, DP0CTL, value);
1195 if (ret)
1196 return ret;
1206 ret = regmap_write(tc->regmap, DP0CTL, value);
1207 if (ret)
1208 return ret;
1215 ret = regmap_write(tc->regmap, SYSCTRL, value);
1216 if (ret)
1217 return ret;
1224 int ret;
1228 ret = regmap_update_bits(tc->regmap, DP0CTL, VID_EN, 0);
1229 if (ret)
1230 return ret;
1240 int ret;
1242 ret = tc_get_display_props(tc);
1243 if (ret < 0) {
1244 dev_err(tc->dev, "failed to read display props: %d\n", ret);
1248 ret = tc_main_link_enable(tc);
1249 if (ret < 0) {
1250 dev_err(tc->dev, "main link enable error: %d\n", ret);
1254 ret = tc_stream_enable(tc);
1255 if (ret < 0) {
1256 dev_err(tc->dev, "main link stream start error: %d\n", ret);
1265 int ret;
1267 ret = tc_stream_disable(tc);
1268 if (ret < 0)
1269 dev_err(tc->dev, "main link stream stop error: %d\n", ret);
1271 ret = tc_main_link_disable(tc);
1272 if (ret < 0)
1273 dev_err(tc->dev, "main link disable error: %d\n", ret);
1331 int ret;
1333 ret = tc_get_display_props(tc);
1334 if (ret < 0) {
1335 dev_err(tc->dev, "failed to read display props: %d\n", ret);
1361 int ret;
1363 ret = regmap_read(tc->regmap, GPIOI, &val);
1364 if (ret)
1404 int ret;
1408 ret = drm_bridge_attach(tc->bridge.encoder, tc->panel_bridge,
1410 if (ret)
1411 return ret;
1419 ret = drm_connector_init(drm, &tc->connector, &tc_connector_funcs, tc->bridge.type);
1420 if (ret)
1421 return ret;
1542 int ret;
1545 ret = drm_of_find_panel_or_bridge(dev->of_node, 2, 0, &panel, NULL);
1546 if (ret && ret != -ENODEV)
1547 return ret;
1576 int ret;
1584 ret = tc_probe_edp_bridge_endpoint(tc);
1585 if (ret)
1586 return ret;
1590 ret = PTR_ERR(tc->refclk);
1591 dev_err(dev, "Failed to get refclk: %d\n", ret);
1592 return ret;
1595 ret = clk_prepare_enable(tc->refclk);
1596 if (ret)
1597 return ret;
1599 ret = devm_add_action_or_reset(dev, tc_clk_disable, tc->refclk);
1600 if (ret)
1601 return ret;
1628 ret = PTR_ERR(tc->regmap);
1629 dev_err(dev, "Failed to initialize regmap: %d\n", ret);
1630 return ret;
1633 ret = of_property_read_u32(dev->of_node, "toshiba,hpd-pin",
1635 if (ret) {
1648 ret = devm_request_threaded_irq(dev, client->irq,
1652 if (ret) {
1654 return ret;
1660 ret = regmap_read(tc->regmap, TC_IDREG, &tc->rev);
1661 if (ret) {
1662 dev_err(tc->dev, "can not read device ID: %d\n", ret);
1663 return ret;
1705 ret = tc_aux_link_setup(tc);
1706 if (ret)
1707 return ret;
1713 ret = drm_dp_aux_register(&tc->aux);
1714 if (ret)
1715 return ret;