Lines Matching refs:tc358764_write
186 static void tc358764_write(struct tc358764 *ctx, u16 addr, u32 val)
222 tc358764_write(ctx, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
223 tc358764_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD);
224 tc358764_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5);
225 tc358764_write(ctx, PPI_D1S_CLRSIPOCOUNT, 5);
226 tc358764_write(ctx, PPI_D2S_CLRSIPOCOUNT, 5);
227 tc358764_write(ctx, PPI_D3S_CLRSIPOCOUNT, 5);
230 tc358764_write(ctx, PPI_LANEENABLE, LANEENABLE_L3EN | LANEENABLE_L2EN |
232 tc358764_write(ctx, DSI_LANEENABLE, LANEENABLE_L3EN | LANEENABLE_L2EN |
236 tc358764_write(ctx, PPI_STARTPPI, PPI_START_FUNCTION);
237 tc358764_write(ctx, DSI_STARTDSI, DSI_RX_START);
240 tc358764_write(ctx, VP_CTRL, VP_CTRL_VSDELAY(15) | VP_CTRL_RGB888(1) |
244 tc358764_write(ctx, LV_PHY0, LV_PHY0_RST(1) |
246 tc358764_write(ctx, LV_PHY0, LV_PHY0_PRBS_ON(4) | LV_PHY0_IS(2) |
250 tc358764_write(ctx, SYS_RST, SYS_RST_LCD);
253 tc358764_write(ctx, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3));
254 tc358764_write(ctx, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0));
255 tc358764_write(ctx, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_G6, LVI_G7));
256 tc358764_write(ctx, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0));
257 tc358764_write(ctx, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2));
258 tc358764_write(ctx, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0));
259 tc358764_write(ctx, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6));
260 tc358764_write(ctx, LV_CFG, LV_CFG_CLKPOL2 | LV_CFG_CLKPOL1 |