Lines Matching refs:hdmi
12 #include <linux/hdmi.h>
37 #include "dw-hdmi-audio.h"
38 #include "dw-hdmi-cec.h"
39 #include "dw-hdmi.h"
138 int (*configure)(struct dw_hdmi *hdmi,
200 void (*enable_audio)(struct dw_hdmi *hdmi);
201 void (*disable_audio)(struct dw_hdmi *hdmi);
219 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
221 regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
224 static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
228 regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
233 static void handle_plugged_change(struct dw_hdmi *hdmi, bool plugged)
235 if (hdmi->plugged_cb && hdmi->codec_dev)
236 hdmi->plugged_cb(hdmi->codec_dev, plugged);
239 int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
244 mutex_lock(&hdmi->mutex);
245 hdmi->plugged_cb = fn;
246 hdmi->codec_dev = codec_dev;
247 plugged = hdmi->last_connector_result == connector_status_connected;
248 handle_plugged_change(hdmi, plugged);
249 mutex_unlock(&hdmi->mutex);
255 static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
257 regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
260 static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
263 hdmi_modb(hdmi, data << shift, mask, reg);
266 static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
268 hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
271 hdmi_writeb(hdmi, HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL |
276 hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
279 hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
282 hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
283 hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
287 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
291 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
295 static bool dw_hdmi_i2c_unwedge(struct dw_hdmi *hdmi)
298 if (!hdmi->unwedge_state)
301 dev_info(hdmi->dev, "Attempting to unwedge stuck i2c bus\n");
335 pinctrl_select_state(hdmi->pinctrl, hdmi->unwedge_state);
337 pinctrl_select_state(hdmi->pinctrl, hdmi->default_state);
342 static int dw_hdmi_i2c_wait(struct dw_hdmi *hdmi)
344 struct dw_hdmi_i2c *i2c = hdmi->i2c;
350 if (!dw_hdmi_i2c_unwedge(hdmi))
366 static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
369 struct dw_hdmi_i2c *i2c = hdmi->i2c;
373 dev_dbg(hdmi->dev, "set read register address to 0\n");
381 hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
383 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
386 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
389 ret = dw_hdmi_i2c_wait(hdmi);
393 *buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
400 static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
403 struct dw_hdmi_i2c *i2c = hdmi->i2c;
417 hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
418 hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
419 hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
422 ret = dw_hdmi_i2c_wait(hdmi);
433 struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
434 struct dw_hdmi_i2c *i2c = hdmi->i2c;
447 dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
451 dev_dbg(hdmi->dev,
461 hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
464 hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
473 dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
477 hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
478 hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
481 ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
484 ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
495 hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
513 static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
519 i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
529 adap->dev.parent = hdmi->dev;
532 i2c_set_adapdata(adap, hdmi);
536 dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
537 devm_kfree(hdmi->dev, i2c);
541 hdmi->i2c = i2c;
543 dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
548 static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
552 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
555 hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
559 hdmi_writeb(hdmi, ((cts >> 16) &
564 hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3);
565 hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
566 hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
568 hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
569 hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
570 hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
637 void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi,
644 hdmi_writeb(hdmi, channel_status[3], HDMI_FC_AUDSCHNLS7);
645 hdmi_writeb(hdmi, channel_status[4], HDMI_FC_AUDSCHNLS8);
649 static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
659 config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
674 dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
682 spin_lock_irq(&hdmi->audio_lock);
683 hdmi->audio_n = n;
684 hdmi->audio_cts = cts;
685 hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
686 spin_unlock_irq(&hdmi->audio_lock);
689 static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
691 mutex_lock(&hdmi->audio_mutex);
692 hdmi_set_clk_regenerator(hdmi, 74250000, hdmi->sample_rate);
693 mutex_unlock(&hdmi->audio_mutex);
696 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
698 mutex_lock(&hdmi->audio_mutex);
699 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
700 hdmi->sample_rate);
701 mutex_unlock(&hdmi->audio_mutex);
704 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
706 mutex_lock(&hdmi->audio_mutex);
707 hdmi->sample_rate = rate;
708 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
709 hdmi->sample_rate);
710 mutex_unlock(&hdmi->audio_mutex);
714 void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt)
718 mutex_lock(&hdmi->audio_mutex);
729 hdmi_modb(hdmi, layout, HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK,
733 hdmi_modb(hdmi, (cnt - 1) << HDMI_FC_AUDICONF0_CC_OFFSET,
736 mutex_unlock(&hdmi->audio_mutex);
740 void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca)
742 mutex_lock(&hdmi->audio_mutex);
744 hdmi_writeb(hdmi, ca, HDMI_FC_AUDICONF2);
746 mutex_unlock(&hdmi->audio_mutex);
750 static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable)
753 hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
755 hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE;
756 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
759 static u8 *hdmi_audio_get_eld(struct dw_hdmi *hdmi)
761 if (!hdmi->curr_conn)
764 return hdmi->curr_conn->eld;
767 static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
769 hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
772 static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi)
774 hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
777 static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi)
779 hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
780 hdmi_enable_audio_clk(hdmi, true);
783 static void dw_hdmi_i2s_audio_disable(struct dw_hdmi *hdmi)
785 hdmi_enable_audio_clk(hdmi, false);
788 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
792 spin_lock_irqsave(&hdmi->audio_lock, flags);
793 hdmi->audio_enable = true;
794 if (hdmi->enable_audio)
795 hdmi->enable_audio(hdmi);
796 spin_unlock_irqrestore(&hdmi->audio_lock, flags);
800 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
804 spin_lock_irqsave(&hdmi->audio_lock, flags);
805 hdmi->audio_enable = false;
806 if (hdmi->disable_audio)
807 hdmi->disable_audio(hdmi);
808 spin_unlock_irqrestore(&hdmi->audio_lock, flags);
905 static void hdmi_video_sample(struct dw_hdmi *hdmi)
910 switch (hdmi->hdmi_data.enc_in_bus_format) {
958 hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
964 hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
965 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
966 hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
967 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
968 hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
969 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
970 hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
973 static int is_color_space_conversion(struct dw_hdmi *hdmi)
975 struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
985 static int is_color_space_decimation(struct dw_hdmi *hdmi)
987 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
990 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) ||
991 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format))
997 static int is_color_space_interpolation(struct dw_hdmi *hdmi)
999 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format))
1002 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
1003 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
1009 static bool is_csc_needed(struct dw_hdmi *hdmi)
1011 return is_color_space_conversion(hdmi) ||
1012 is_color_space_decimation(hdmi) ||
1013 is_color_space_interpolation(hdmi);
1016 static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
1023 is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
1024 is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format);
1027 if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601)
1032 if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601)
1038 hdmi->hdmi_data.rgb_limited_range) {
1048 hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
1049 hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
1050 hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
1051 hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
1052 hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
1053 hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
1056 hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
1060 static void hdmi_video_csc(struct dw_hdmi *hdmi)
1067 if (is_color_space_interpolation(hdmi))
1069 else if (is_color_space_decimation(hdmi))
1072 switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
1091 hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
1092 hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
1095 dw_hdmi_update_csc_coeffs(hdmi);
1103 static void hdmi_video_packetize(struct dw_hdmi *hdmi)
1108 struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
1111 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
1112 hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) ||
1113 hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
1115 hdmi->hdmi_data.enc_out_bus_format)) {
1132 } else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
1134 hdmi->hdmi_data.enc_out_bus_format)) {
1160 hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
1162 hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
1174 hdmi_modb(hdmi, vp_conf,
1178 hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
1181 hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
1199 hdmi_modb(hdmi, vp_conf,
1203 hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
1208 hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
1216 static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
1219 hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
1223 static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
1227 while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
1232 hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
1237 void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
1240 hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
1241 hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
1242 hdmi_writeb(hdmi, (unsigned char)(data >> 8),
1244 hdmi_writeb(hdmi, (unsigned char)(data >> 0),
1246 hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
1248 hdmi_phy_wait_i2c_done(hdmi, 1000);
1253 static bool dw_hdmi_support_scdc(struct dw_hdmi *hdmi,
1257 if (hdmi->version < 0x200a)
1261 if (!hdmi->ddc)
1265 if (!display->hdmi.scdc.supported ||
1266 !display->hdmi.scdc.scrambling.supported)
1273 if (!display->hdmi.scdc.scrambling.low_rates &&
1293 void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi,
1296 unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
1299 if (dw_hdmi_support_scdc(hdmi, display)) {
1301 drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1);
1303 drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 0);
1308 static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
1310 hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
1315 static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
1317 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1322 static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
1324 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1329 void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
1331 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1337 void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
1339 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1345 static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
1347 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1352 static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
1354 hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
1359 void dw_hdmi_phy_reset(struct dw_hdmi *hdmi)
1362 hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
1363 hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
1367 void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address)
1369 hdmi_phy_test_clear(hdmi, 1);
1370 hdmi_writeb(hdmi, address, HDMI_PHY_I2CM_SLAVE_ADDR);
1371 hdmi_phy_test_clear(hdmi, 0);
1375 static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
1377 const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
1382 dw_hdmi_phy_enable_tmds(hdmi, 0);
1383 dw_hdmi_phy_enable_powerdown(hdmi, true);
1387 dw_hdmi_phy_gen2_txpwron(hdmi, 0);
1394 val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
1402 dev_warn(hdmi->dev, "PHY failed to power down\n");
1404 dev_dbg(hdmi->dev, "PHY powered down in %u iterations\n", i);
1406 dw_hdmi_phy_gen2_pddq(hdmi, 1);
1409 static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
1411 const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
1416 dw_hdmi_phy_enable_powerdown(hdmi, false);
1419 dw_hdmi_phy_enable_tmds(hdmi, 0);
1420 dw_hdmi_phy_enable_tmds(hdmi, 1);
1424 dw_hdmi_phy_gen2_txpwron(hdmi, 1);
1425 dw_hdmi_phy_gen2_pddq(hdmi, 0);
1429 val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
1437 dev_err(hdmi->dev, "PHY PLL failed to lock\n");
1441 dev_dbg(hdmi->dev, "PHY PLL locked %u iterations\n", i);
1450 static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
1478 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
1480 dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
1482 dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
1485 dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
1486 dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
1489 dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
1490 dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
1492 dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
1496 dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
1502 static int hdmi_phy_configure(struct dw_hdmi *hdmi,
1505 const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
1506 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
1507 unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
1508 unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
1511 dw_hdmi_phy_power_off(hdmi);
1513 dw_hdmi_set_high_tmds_clock_ratio(hdmi, display);
1517 dw_hdmi_phy_enable_svsret(hdmi, 1);
1519 dw_hdmi_phy_reset(hdmi);
1521 hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
1523 dw_hdmi_phy_i2c_set_addr(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2);
1527 ret = pdata->configure_phy(hdmi, pdata->priv_data, mpixelclock);
1529 ret = phy->configure(hdmi, pdata, mpixelclock);
1531 dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
1540 return dw_hdmi_phy_power_on(hdmi);
1543 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
1551 dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
1552 dw_hdmi_phy_sel_interface_control(hdmi, 0);
1554 ret = hdmi_phy_configure(hdmi, display);
1562 static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
1564 dw_hdmi_phy_power_off(hdmi);
1567 enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
1570 return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
1575 void dw_hdmi_phy_update_hpd(struct dw_hdmi *hdmi, void *data,
1578 u8 old_mask = hdmi->phy_mask;
1581 hdmi->phy_mask |= HDMI_PHY_RX_SENSE;
1583 hdmi->phy_mask &= ~HDMI_PHY_RX_SENSE;
1585 if (old_mask != hdmi->phy_mask)
1586 hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
1590 void dw_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
1596 hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE, HDMI_PHY_POL0);
1597 hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
1601 hdmi_writeb(hdmi, hdmi->phy_mask, HDMI_PHY_MASK0);
1604 hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE,
1606 hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
1623 static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
1627 if (hdmi->hdmi_data.video_mode.mdataenablepolarity)
1633 hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
1636 hdmi_modb(hdmi, de, HDMI_A_VIDPOLCFG_DATAENPOL_MASK, HDMI_A_VIDPOLCFG);
1638 hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
1642 static void hdmi_config_AVI(struct dw_hdmi *hdmi,
1652 if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
1654 hdmi->hdmi_data.rgb_limited_range ?
1663 if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
1665 else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
1667 else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
1673 if (!hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
1674 switch (hdmi->hdmi_data.enc_out_encoding) {
1676 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
1684 if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
1721 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
1727 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
1735 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
1739 hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
1742 val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
1745 ((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
1748 hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
1756 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
1759 hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
1760 hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
1761 hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
1762 hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
1763 hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
1764 hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
1765 hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
1766 hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
1769 static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi,
1790 dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n",
1794 hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
1798 hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE);
1801 hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0);
1802 hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1);
1803 hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2);
1806 hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0);
1807 hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1);
1810 hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2);
1813 hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1);
1816 hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2);
1819 hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
1823 static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
1832 if (!hdmi->plat_data->use_drm_infoframe)
1835 hdmi_modb(hdmi, HDMI_FC_PACKET_TX_EN_DRM_DISABLE,
1844 dev_err(hdmi->dev, "Failed to pack drm infoframe: %zd\n", err);
1848 hdmi_writeb(hdmi, frame.version, HDMI_FC_DRM_HB0);
1849 hdmi_writeb(hdmi, frame.length, HDMI_FC_DRM_HB1);
1852 hdmi_writeb(hdmi, buffer[4 + i], HDMI_FC_DRM_PB0 + i);
1854 hdmi_writeb(hdmi, 1, HDMI_FC_DRM_UP);
1855 hdmi_modb(hdmi, HDMI_FC_PACKET_TX_EN_DRM_ENABLE,
1859 static void hdmi_av_composer(struct dw_hdmi *hdmi,
1864 const struct drm_hdmi_info *hdmi_info = &display->hdmi;
1865 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
1871 dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock);
1875 if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
1877 hdmi->hdmi_data.enc_out_bus_format)) {
1890 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
1893 dev_dbg(hdmi->dev, "final tmdsclock = %d\n", vmode->mtmdsclock);
1896 inv_val = (hdmi->hdmi_data.hdcp_enable ||
1897 (dw_hdmi_support_scdc(hdmi, display) &&
1915 if (hdmi->vic == 39)
1926 inv_val |= hdmi->sink_is_hdmi ?
1930 hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
1941 if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
1965 if (dw_hdmi_support_scdc(hdmi, display)) {
1977 drm_scdc_readb(hdmi->ddc, SCDC_SINK_VERSION,
1979 drm_scdc_writeb(hdmi->ddc, SCDC_SOURCE_VERSION,
1983 drm_scdc_set_scrambling(hdmi->ddc, 1);
1992 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
1994 hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL);
1996 hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
1997 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
1999 drm_scdc_set_scrambling(hdmi->ddc, 0);
2004 hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
2005 hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0);
2008 hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
2009 hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
2012 hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
2013 hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
2016 hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
2019 hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
2020 hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
2023 hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
2026 hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
2027 hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
2030 hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
2034 static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
2037 hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
2038 hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
2039 hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
2042 hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
2043 hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
2044 hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
2047 hdmi->mc_clkdis |= HDMI_MC_CLKDIS_HDCPCLK_DISABLE |
2052 hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
2053 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
2055 hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
2056 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
2059 if (is_csc_needed(hdmi)) {
2060 hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
2061 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
2063 hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
2066 hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE;
2067 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
2069 hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
2075 static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
2098 switch (hdmi->version) {
2115 hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
2117 val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
2119 hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
2122 static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
2124 hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
2128 static int dw_hdmi_setup(struct dw_hdmi *hdmi,
2134 hdmi_disable_overflow_interrupts(hdmi);
2136 hdmi->vic = drm_match_cea_mode(mode);
2138 if (!hdmi->vic) {
2139 dev_dbg(hdmi->dev, "Non-CEA mode used in HDMI\n");
2141 dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic);
2144 if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
2145 (hdmi->vic == 21) || (hdmi->vic == 22) ||
2146 (hdmi->vic == 2) || (hdmi->vic == 3) ||
2147 (hdmi->vic == 17) || (hdmi->vic == 18))
2148 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
2150 hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
2152 hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
2153 hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
2155 if (hdmi->hdmi_data.enc_in_bus_format == MEDIA_BUS_FMT_FIXED)
2156 hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
2159 if (hdmi->plat_data->input_bus_encoding)
2160 hdmi->hdmi_data.enc_in_encoding =
2161 hdmi->plat_data->input_bus_encoding;
2163 hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
2165 if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED)
2166 hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
2168 hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi &&
2172 hdmi->hdmi_data.pix_repet_factor = 0;
2173 hdmi->hdmi_data.hdcp_enable = 0;
2174 hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
2177 hdmi_av_composer(hdmi, &connector->display_info, mode);
2180 ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data,
2182 &hdmi->previous_mode);
2185 hdmi->phy.enabled = true;
2188 dw_hdmi_enable_video_path(hdmi);
2190 if (hdmi->sink_has_audio) {
2191 dev_dbg(hdmi->dev, "sink has audio support\n");
2194 hdmi_clk_regenerator_update_pixel_clock(hdmi);
2195 hdmi_enable_audio_clk(hdmi, hdmi->audio_enable);
2199 if (hdmi->sink_is_hdmi) {
2200 dev_dbg(hdmi->dev, "%s HDMI mode\n", __func__);
2203 hdmi_config_AVI(hdmi, connector, mode);
2204 hdmi_config_vendor_specific_infoframe(hdmi, connector, mode);
2205 hdmi_config_drm_infoframe(hdmi, connector);
2207 dev_dbg(hdmi->dev, "%s DVI mode\n", __func__);
2210 hdmi_video_packetize(hdmi);
2211 hdmi_video_csc(hdmi);
2212 hdmi_video_sample(hdmi);
2213 hdmi_tx_hdcp_config(hdmi);
2215 dw_hdmi_clear_overflow(hdmi);
2220 static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
2231 ih_mute = hdmi_readb(hdmi, HDMI_IH_MUTE) |
2235 hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
2238 hdmi_writeb(hdmi, 0xff, HDMI_VP_MASK);
2239 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
2240 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
2241 hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
2242 hdmi_writeb(hdmi, 0xff, HDMI_PHY_MASK0);
2243 hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_INT_ADDR);
2244 hdmi_writeb(hdmi, 0xff, HDMI_PHY_I2CM_CTLINT_ADDR);
2245 hdmi_writeb(hdmi, 0xff, HDMI_AUD_INT);
2246 hdmi_writeb(hdmi, 0xff, HDMI_AUD_SPDIFINT);
2247 hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK);
2248 hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK);
2249 hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
2250 hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
2251 hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
2254 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
2255 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
2256 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
2257 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
2258 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_PHY_STAT0);
2259 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
2260 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
2261 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
2262 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
2263 hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
2268 hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
2271 static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
2273 hdmi->bridge_is_on = true;
2277 * is only be called when !hdmi->disabled.
2279 dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode);
2282 static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
2284 if (hdmi->phy.enabled) {
2285 hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
2286 hdmi->phy.enabled = false;
2289 hdmi->bridge_is_on = false;
2292 static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
2294 int force = hdmi->force;
2296 if (hdmi->disabled) {
2299 if (hdmi->rxsense)
2306 if (hdmi->bridge_is_on)
2307 dw_hdmi_poweroff(hdmi);
2309 if (!hdmi->bridge_is_on)
2310 dw_hdmi_poweron(hdmi);
2326 static void dw_hdmi_update_phy_mask(struct dw_hdmi *hdmi)
2328 if (hdmi->phy.ops->update_hpd)
2329 hdmi->phy.ops->update_hpd(hdmi, hdmi->phy.data,
2330 hdmi->force, hdmi->disabled,
2331 hdmi->rxsense);
2334 static enum drm_connector_status dw_hdmi_detect(struct dw_hdmi *hdmi)
2338 result = hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
2340 mutex_lock(&hdmi->mutex);
2341 if (result != hdmi->last_connector_result) {
2342 dev_dbg(hdmi->dev, "read_hpd result: %d", result);
2343 handle_plugged_change(hdmi,
2345 hdmi->last_connector_result = result;
2347 mutex_unlock(&hdmi->mutex);
2352 static struct edid *dw_hdmi_get_edid(struct dw_hdmi *hdmi,
2357 if (!hdmi->ddc)
2360 edid = drm_get_edid(connector, hdmi->ddc);
2362 dev_dbg(hdmi->dev, "failed to get edid\n");
2366 dev_dbg(hdmi->dev, "got edid: width[%d] x height[%d]\n",
2369 hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
2370 hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
2382 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
2384 return dw_hdmi_detect(hdmi);
2389 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
2394 edid = dw_hdmi_get_edid(hdmi, connector);
2399 cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid);
2447 struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
2450 mutex_lock(&hdmi->mutex);
2451 hdmi->force = connector->force;
2452 dw_hdmi_update_power(hdmi);
2453 dw_hdmi_update_phy_mask(hdmi);
2454 mutex_unlock(&hdmi->mutex);
2472 static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
2474 struct drm_connector *connector = &hdmi->connector;
2478 if (hdmi->version >= 0x200a)
2480 hdmi->plat_data->ycbcr_420_allowed;
2489 drm_connector_init_with_ddc(hdmi->bridge.dev, connector,
2492 hdmi->ddc);
2502 if (hdmi->version >= 0x200a && hdmi->plat_data->use_drm_infoframe)
2506 drm_connector_attach_encoder(connector, hdmi->bridge.encoder);
2510 notifier = cec_notifier_conn_register(hdmi->dev, NULL, &conn_info);
2514 mutex_lock(&hdmi->cec_notifier_mutex);
2515 hdmi->cec_notifier = notifier;
2516 mutex_unlock(&hdmi->cec_notifier_mutex);
2557 bool is_hdmi2_sink = info->hdmi.scdc.supported ||
2569 /* If dw-hdmi is the first or only bridge, avoid negociating with ourselves */
2588 (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_48))
2592 (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36))
2596 (info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30))
2782 struct dw_hdmi *hdmi = bridge->driver_private;
2784 hdmi->hdmi_data.enc_out_bus_format =
2787 hdmi->hdmi_data.enc_in_bus_format =
2790 dev_dbg(hdmi->dev, "input format 0x%04x, output format 0x%04x\n",
2800 struct dw_hdmi *hdmi = bridge->driver_private;
2805 return dw_hdmi_connector_create(hdmi);
2810 struct dw_hdmi *hdmi = bridge->driver_private;
2812 mutex_lock(&hdmi->cec_notifier_mutex);
2813 cec_notifier_conn_unregister(hdmi->cec_notifier);
2814 hdmi->cec_notifier = NULL;
2815 mutex_unlock(&hdmi->cec_notifier_mutex);
2823 struct dw_hdmi *hdmi = bridge->driver_private;
2824 const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
2832 mode_status = pdata->mode_valid(hdmi, pdata->priv_data, info,
2842 struct dw_hdmi *hdmi = bridge->driver_private;
2844 mutex_lock(&hdmi->mutex);
2847 memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
2849 mutex_unlock(&hdmi->mutex);
2855 struct dw_hdmi *hdmi = bridge->driver_private;
2857 mutex_lock(&hdmi->mutex);
2858 hdmi->disabled = true;
2859 hdmi->curr_conn = NULL;
2860 dw_hdmi_update_power(hdmi);
2861 dw_hdmi_update_phy_mask(hdmi);
2862 mutex_unlock(&hdmi->mutex);
2868 struct dw_hdmi *hdmi = bridge->driver_private;
2875 mutex_lock(&hdmi->mutex);
2876 hdmi->disabled = false;
2877 hdmi->curr_conn = connector;
2878 dw_hdmi_update_power(hdmi);
2879 dw_hdmi_update_phy_mask(hdmi);
2880 mutex_unlock(&hdmi->mutex);
2885 struct dw_hdmi *hdmi = bridge->driver_private;
2887 return dw_hdmi_detect(hdmi);
2893 struct dw_hdmi *hdmi = bridge->driver_private;
2895 return dw_hdmi_get_edid(hdmi, connector);
2919 static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
2921 struct dw_hdmi_i2c *i2c = hdmi->i2c;
2924 stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
2928 hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
2939 struct dw_hdmi *hdmi = dev_id;
2943 if (hdmi->i2c)
2944 ret = dw_hdmi_i2c_irq(hdmi);
2946 intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
2948 hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
2955 void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
2957 mutex_lock(&hdmi->mutex);
2959 if (!hdmi->force) {
2965 hdmi->rxsense = false;
2974 hdmi->rxsense = true;
2976 dw_hdmi_update_power(hdmi);
2977 dw_hdmi_update_phy_mask(hdmi);
2979 mutex_unlock(&hdmi->mutex);
2985 struct dw_hdmi *hdmi = dev_id;
2989 intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
2990 phy_int_pol = hdmi_readb(hdmi, HDMI_PHY_POL0);
2991 phy_stat = hdmi_readb(hdmi, HDMI_PHY_STAT0);
3006 hdmi_modb(hdmi, ~phy_int_pol, phy_pol_mask, HDMI_PHY_POL0);
3017 dw_hdmi_setup_rx_sense(hdmi,
3022 mutex_lock(&hdmi->cec_notifier_mutex);
3023 cec_notifier_phys_addr_invalidate(hdmi->cec_notifier);
3024 mutex_unlock(&hdmi->cec_notifier_mutex);
3035 dev_dbg(hdmi->dev, "EVENT=%s\n",
3039 if (hdmi->bridge.dev) {
3040 drm_helper_hpd_irq_event(hdmi->bridge.dev);
3041 drm_bridge_hpd_notify(&hdmi->bridge, status);
3045 hdmi_writeb(hdmi, intr_stat, HDMI_IH_PHY_STAT0);
3046 hdmi_writeb(hdmi, ~(HDMI_IH_PHY_STAT0_HPD | HDMI_IH_PHY_STAT0_RX_SENSE),
3091 static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
3096 phy_type = hdmi->plat_data->phy_force_vendor ?
3098 hdmi_readb(hdmi, HDMI_CONFIG2_ID);
3102 if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
3103 dev_err(hdmi->dev,
3108 hdmi->phy.ops = hdmi->plat_data->phy_ops;
3109 hdmi->phy.data = hdmi->plat_data->phy_data;
3110 hdmi->phy.name = hdmi->plat_data->phy_name;
3117 hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
3118 hdmi->phy.name = dw_hdmi_phys[i].name;
3119 hdmi->phy.data = (void *)&dw_hdmi_phys[i];
3122 !hdmi->plat_data->configure_phy) {
3123 dev_err(hdmi->dev, "%s requires platform support\n",
3124 hdmi->phy.name);
3132 dev_err(hdmi->dev, "Unsupported HDMI PHY type (%02x)\n", phy_type);
3136 static void dw_hdmi_cec_enable(struct dw_hdmi *hdmi)
3138 mutex_lock(&hdmi->mutex);
3139 hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CECCLK_DISABLE;
3140 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
3141 mutex_unlock(&hdmi->mutex);
3144 static void dw_hdmi_cec_disable(struct dw_hdmi *hdmi)
3146 mutex_lock(&hdmi->mutex);
3147 hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CECCLK_DISABLE;
3148 hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
3149 mutex_unlock(&hdmi->mutex);
3173 static void dw_hdmi_init_hw(struct dw_hdmi *hdmi)
3175 initialize_hdmi_ih_mutes(hdmi);
3182 dw_hdmi_i2c_init(hdmi);
3184 if (hdmi->phy.ops->setup_hpd)
3185 hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data);
3199 struct dw_hdmi *hdmi;
3209 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
3210 if (!hdmi)
3213 hdmi->plat_data = plat_data;
3214 hdmi->dev = dev;
3215 hdmi->sample_rate = 48000;
3216 hdmi->disabled = true;
3217 hdmi->rxsense = true;
3218 hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
3219 hdmi->mc_clkdis = 0x7f;
3220 hdmi->last_connector_result = connector_status_disconnected;
3222 mutex_init(&hdmi->mutex);
3223 mutex_init(&hdmi->audio_mutex);
3224 mutex_init(&hdmi->cec_notifier_mutex);
3225 spin_lock_init(&hdmi->audio_lock);
3229 hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
3231 if (!hdmi->ddc) {
3232 dev_dbg(hdmi->dev, "failed to read ddc node\n");
3237 dev_dbg(hdmi->dev, "no ddc property found\n");
3247 hdmi->reg_shift = 2;
3258 hdmi->regs = devm_ioremap_resource(dev, iores);
3259 if (IS_ERR(hdmi->regs)) {
3260 ret = PTR_ERR(hdmi->regs);
3264 hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
3265 if (IS_ERR(hdmi->regm)) {
3267 ret = PTR_ERR(hdmi->regm);
3271 hdmi->regm = plat_data->regm;
3274 hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
3275 if (IS_ERR(hdmi->isfr_clk)) {
3276 ret = PTR_ERR(hdmi->isfr_clk);
3277 dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
3281 ret = clk_prepare_enable(hdmi->isfr_clk);
3283 dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret);
3287 hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb");
3288 if (IS_ERR(hdmi->iahb_clk)) {
3289 ret = PTR_ERR(hdmi->iahb_clk);
3290 dev_err(hdmi->dev, "Unable to get HDMI iahb clk: %d\n", ret);
3294 ret = clk_prepare_enable(hdmi->iahb_clk);
3296 dev_err(hdmi->dev, "Cannot enable HDMI iahb clock: %d\n", ret);
3300 hdmi->cec_clk = devm_clk_get(hdmi->dev, "cec");
3301 if (PTR_ERR(hdmi->cec_clk) == -ENOENT) {
3302 hdmi->cec_clk = NULL;
3303 } else if (IS_ERR(hdmi->cec_clk)) {
3304 ret = PTR_ERR(hdmi->cec_clk);
3306 dev_err(hdmi->dev, "Cannot get HDMI cec clock: %d\n",
3309 hdmi->cec_clk = NULL;
3312 ret = clk_prepare_enable(hdmi->cec_clk);
3314 dev_err(hdmi->dev, "Cannot enable HDMI cec clock: %d\n",
3321 hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
3322 | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
3323 prod_id0 = hdmi_readb(hdmi, HDMI_PRODUCT_ID0);
3324 prod_id1 = hdmi_readb(hdmi, HDMI_PRODUCT_ID1);
3329 hdmi->version, prod_id0, prod_id1);
3334 ret = dw_hdmi_detect_phy(hdmi);
3339 hdmi->version >> 12, hdmi->version & 0xfff,
3341 hdmi->phy.name);
3343 dw_hdmi_init_hw(hdmi);
3353 dev_name(dev), hdmi);
3361 hdmi_init_clk_regenerator(hdmi);
3364 if (!hdmi->ddc) {
3366 hdmi->pinctrl = devm_pinctrl_get(dev);
3367 if (!IS_ERR(hdmi->pinctrl)) {
3368 hdmi->unwedge_state =
3369 pinctrl_lookup_state(hdmi->pinctrl, "unwedge");
3370 hdmi->default_state =
3371 pinctrl_lookup_state(hdmi->pinctrl, "default");
3373 if (IS_ERR(hdmi->default_state) ||
3374 IS_ERR(hdmi->unwedge_state)) {
3375 if (!IS_ERR(hdmi->unwedge_state))
3378 hdmi->default_state = NULL;
3379 hdmi->unwedge_state = NULL;
3383 hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
3384 if (IS_ERR(hdmi->ddc))
3385 hdmi->ddc = NULL;
3388 hdmi->bridge.driver_private = hdmi;
3389 hdmi->bridge.funcs = &dw_hdmi_bridge_funcs;
3390 hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
3393 hdmi->bridge.of_node = pdev->dev.of_node;
3400 config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
3401 config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
3407 audio.base = hdmi->regs;
3409 audio.hdmi = hdmi;
3411 hdmi->enable_audio = dw_hdmi_ahb_audio_enable;
3412 hdmi->disable_audio = dw_hdmi_ahb_audio_disable;
3414 pdevinfo.name = "dw-hdmi-ahb-audio";
3418 hdmi->audio = platform_device_register_full(&pdevinfo);
3422 audio.hdmi = hdmi;
3426 hdmi->enable_audio = dw_hdmi_i2s_audio_enable;
3427 hdmi->disable_audio = dw_hdmi_i2s_audio_disable;
3429 pdevinfo.name = "dw-hdmi-i2s-audio";
3433 hdmi->audio = platform_device_register_full(&pdevinfo);
3437 cec.hdmi = hdmi;
3441 pdevinfo.name = "dw-hdmi-cec";
3446 hdmi->cec = platform_device_register_full(&pdevinfo);
3449 drm_bridge_add(&hdmi->bridge);
3451 return hdmi;
3454 clk_disable_unprepare(hdmi->iahb_clk);
3455 if (hdmi->cec_clk)
3456 clk_disable_unprepare(hdmi->cec_clk);
3458 clk_disable_unprepare(hdmi->isfr_clk);
3460 i2c_put_adapter(hdmi->ddc);
3466 void dw_hdmi_remove(struct dw_hdmi *hdmi)
3468 drm_bridge_remove(&hdmi->bridge);
3470 if (hdmi->audio && !IS_ERR(hdmi->audio))
3471 platform_device_unregister(hdmi->audio);
3472 if (!IS_ERR(hdmi->cec))
3473 platform_device_unregister(hdmi->cec);
3476 hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
3478 clk_disable_unprepare(hdmi->iahb_clk);
3479 clk_disable_unprepare(hdmi->isfr_clk);
3480 if (hdmi->cec_clk)
3481 clk_disable_unprepare(hdmi->cec_clk);
3483 if (hdmi->i2c)
3484 i2c_del_adapter(&hdmi->i2c->adap);
3486 i2c_put_adapter(hdmi->ddc);
3497 struct dw_hdmi *hdmi;
3500 hdmi = dw_hdmi_probe(pdev, plat_data);
3501 if (IS_ERR(hdmi))
3502 return hdmi;
3504 ret = drm_bridge_attach(encoder, &hdmi->bridge, NULL, 0);
3506 dw_hdmi_remove(hdmi);
3511 return hdmi;
3515 void dw_hdmi_unbind(struct dw_hdmi *hdmi)
3517 dw_hdmi_remove(hdmi);
3521 void dw_hdmi_resume(struct dw_hdmi *hdmi)
3523 dw_hdmi_init_hw(hdmi);
3533 MODULE_ALIAS("platform:dw-hdmi");