Lines Matching refs:x00

18 /* Vendor ID High byte, default value: 0x00 */
30 /* OTP DBYTE510, default value: 0x00 */
33 /* System Control #1, default value: 0x00 */
54 /* Dual link Control, default value: 0x00 */
76 /* AKSV_1, default value: 0x00 */
79 /* Video H Resolution #1, default value: 0x00 */
82 /* Video Mode, default value: 0x00 */
96 /* I2C Address reassignment, default value: 0x00 */
101 /* Fast Interrupt Status, default value: 0x00 */
137 /* Interrupt State, default value: 0x00 */
141 /* Interrupt Source #1, default value: 0x00 */
144 /* Interrupt Source #2, default value: 0x00 */
151 /* Interrupt Source #5, default value: 0x00 */
154 /* Interrupt #1 Mask, default value: 0x00 */
157 /* Interrupt #2 Mask, default value: 0x00 */
160 /* Interrupt #3 Mask, default value: 0x00 */
163 /* Interrupt #5 Mask, default value: 0x00 */
189 /* Interrupt Source 7, default value: 0x00 */
192 /* Interrupt Source 8, default value: 0x00 */
195 /* Interrupt #7 Mask, default value: 0x00 */
198 /* Interrupt #8 Mask, default value: 0x00 */
212 /* BIST CNTL, default value: 0x00 */
223 /* BIST DURATION0, default value: 0x00 */
227 /* BIST VIDEO_MODE, default value: 0x00 */
231 /* BIST DURATION0, default value: 0x00 */
234 /* BIST DURATION1, default value: 0x00 */
237 /* BIST DURATION2, default value: 0x00 */
240 /* BIST 8BIT_PATTERN, default value: 0x00 */
263 /* DDC I2C Target Slave Address, default value: 0x00 */
267 /* DDC I2C Target Segment Address, default value: 0x00 */
270 /* DDC I2C Target Offset Address, default value: 0x00 */
273 /* DDC I2C Data In count #1, default value: 0x00 */
276 /* DDC I2C Data In count #2, default value: 0x00 */
301 /* DDC I2C FIFO Data In/Out, default value: 0x00 */
304 /* DDC I2C Data Out Counter, default value: 0x00 */
320 /* CBUS Address, default value: 0x00 */
329 /* USBT CTRL0, default value: 0x00 */
364 /* TDM TX INT Low, default value: 0x00 */
375 /* TDM TX INT High, default value: 0x00 */
401 /* TDM RX Status 2nd, default value: 0x00 */
406 /* TDM RX INT Low, default value: 0x00 */
409 /* TDM RX INT High, default value: 0x00 */
414 /* TDM RX INTMASK High, default value: 0x00 */
417 /* HSIC TX CRTL, default value: 0x00 */
425 /* HSIC TX INT Low, default value: 0x00 */
428 /* HSIC TX INT High, default value: 0x00 */
431 /* HSIC Keeper, default value: 0x00 */
454 /* HSIC Flow Control INTR0, default value: 0x00 */
477 /* TMDS Clock Enable, default value: 0x00 */
481 /* TMDS Channel Enable, default value: 0x00 */
501 /* TMDS 0 Digital PLL Mode Control, default value: 0x00 */
511 /* Packet Filter0, default value: 0x00 */
522 /* Packet Filter1, default value: 0x00 */
561 /* rx_hdmi Clear Buffer, default value: 0x00 */
571 /* RX_HDMI VSI Header1, default value: 0x00 */
580 /* Interrupt Source 9, default value: 0x00 */
586 /* Interrupt 9 Mask, default value: 0x00 */
589 /* TPI CBUS Start, default value: 0x00 */
611 /* EDID FIFO Addr, default value: 0x00 */
614 /* EDID FIFO Write Data, default value: 0x00 */
617 /* EDID/DEVCAP FIFO Internal Addr, default value: 0x00 */
620 /* EDID FIFO Read Data, default value: 0x00 */
623 /* EDID DDC Segment Pointer, default value: 0x00 */
626 /* TX IP BIST CNTL and Status, default value: 0x00 */
636 /* TX IP BIST INST LOW, default value: 0x00 */
640 /* TX IP BIST PATTERN LOW, default value: 0x00 */
644 /* TX IP BIST CONFIGURE LOW, default value: 0x00 */
664 /* E-MSC RFIFO ByteCnt, default value: 0x00 */
668 /* SPI Burst Cnt Status, default value: 0x00 */
671 /* SPI Burst Status and SWRST, default value: 0x00 */
678 /* E-MSC 1st Interrupt, default value: 0x00 */
689 /* E-MSC Interrupt Mask, default value: 0x00 */
692 /* I2C E-MSC XMIT FIFO Write Port, default value: 0x00 */
695 /* I2C E-MSC RCV FIFO Write Port, default value: 0x00 */
698 /* E-MSC 2nd Interrupt, default value: 0x00 */
702 /* E-MSC Interrupt Mask, default value: 0x00 */
706 /* MHL Top Ctl, default value: 0x00 */
760 #define VAL_MHL_PLL_CTL0_AUD_CLK_RATIO_5_1	0x00
766 #define VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_HALF_X	0x00
783 #define VAL_MHL_CBUS_CTL0_CBUS_RGND_VBIAS_734	0x00
791 #define VAL_MHL_CBUS_CTL0_CBUS_DRV_SEL_WEAKEST	0x00
799 #define VAL_MHL_CBUS_CTL1_0888_OHM		0x00
814 /* MHL CoC 4th Ctl, default value: 0x00 */
849 /* Tx Zone Ctl1, default value: 0x00 */
853 /* MHL3 Tx Zone Ctl, default value: 0x00 */
859 #define VAL_TX_ZONE_CTL3_TX_ZONE_6GBPS		0x00
873 /* HDCP Interrupt 0, default value: 0x00 */
876 /* HDCP Interrupt 0 Mask, default value: 0x00 */
898 /* HDCP Misc Control, default value: 0x00 */
906 /* HDCP RPT SMNG K, default value: 0x00 */
909 /* HDCP RPT SMNG In, default value: 0x00 */
912 /* HDCP Auth Status, default value: 0x00 */
915 /* HDCP RPT RCVID Out, default value: 0x00 */
921 /* HDCP GP Out 0, default value: 0x00 */
924 /* HDCP Repeater RCVR ID 0, default value: 0x00 */
927 /* HDCP DDCM Status, default value: 0x00 */
969 /* MHL Capability 1st Byte, default value: 0x00 */
972 /* MHL Interrupt 1st Byte, default value: 0x00 */
975 /* Device Status 1st byte, default value: 0x00 */
978 /* CBUS Scratch Pad 1st Byte, default value: 0x00 */
981 /* MHL Extended Capability 1st Byte, default value: 0x00 */
984 /* Device Extended Status 1st byte, default value: 0x00 */
987 /* TPI DTD Byte2, default value: 0x00 */
992 #define VAL_TPI_FORMAT_RGB			0x00
999 /* Input Format, default value: 0x00 */
1006 /* Output Format, default value: 0x00 */
1012 /* TPI AVI Check Sum, default value: 0x00 */
1015 /* TPI System Control, default value: 0x00 */
1026 /* TPI COPP Query Data, default value: 0x00 */
1031 #define VAL_TPI_COPP_LINK_STATUS_NORMAL		0x00
1040 /* TPI COPP Control Data, default value: 0x00 */
1049 /* TPI Interrupt Enable, default value: 0x00 */
1052 /* TPI Interrupt Status Low Byte, default value: 0x00 */
1062 /* TPI DS BCAPS Status, default value: 0x00 */
1065 /* TPI BStatus1, default value: 0x00 */
1077 /* TPI HW Optimization Control #3, default value: 0x00 */
1084 /* TPI Info Frame Select, default value: 0x00 */
1090 #define VAL_TPI_INFO_FSEL_AVI			0x00
1098 /* TPI Info Byte #0, default value: 0x00 */
1101 /* CoC Status, default value: 0x00 */
1130 /* CoC 7th Ctl, default value: 0x00 */
1144 /* CoC 10th Ctl, default value: 0x00 */
1147 /* CoC 11th Ctl, default value: 0x00 */
1150 /* CoC 12th Ctl, default value: 0x00 */
1166 /* CoC 16th Ctl, default value: 0x00 */
1176 /* CoC 21st Ctl, default value: 0x00 */
1181 /* CoC 22nd Ctl, default value: 0x00 */
1187 /* CoC Interrupt, default value: 0x00 */
1190 /* CoC Interrupt Mask, default value: 0x00 */
1195 /* CoC Misc Ctl, default value: 0x00 */
1199 /* CoC 24th Ctl, default value: 0x00 */
1204 /* CoC 25th Ctl, default value: 0x00 */
1209 /* CoC 26th Ctl, default value: 0x00 */
1214 /* CoC 27th Ctl, default value: 0x00 */
1219 /* DoC 9th Status, default value: 0x00 */
1222 /* DoC 10th Status, default value: 0x00 */
1225 /* DoC 5th CFG, default value: 0x00 */
1232 /* DoC 7th Ctl, default value: 0x00 */
1239 /* DoC 8th Ctl, default value: 0x00 */
1247 /* DoC 9th Ctl, default value: 0x00 */
1254 /* DoC 10th Ctl, default value: 0x00 */
1257 /* DoC 11th Ctl, default value: 0x00 */
1260 /* DoC 15th Ctl, default value: 0x00 */
1267 /* Interrupt Mask 1st, default value: 0x00 */
1270 /* Interrupt Mask 2nd, default value: 0x00 */
1273 /* Interrupt Mask 3rd, default value: 0x00 */
1276 /* Interrupt Mask 4th, default value: 0x00 */
1279 /* MDT Receive Time Out, default value: 0x00 */
1282 /* MDT Transmit Time Out, default value: 0x00 */
1285 /* MDT Receive Control, default value: 0x00 */
1295 /* MDT Receive Read Port, default value: 0x00 */
1309 /* MDT Receive WRITE Port, default value: 0x00 */
1312 /* MDT RFIFO Status, default value: 0x00 */
1329 /* MDT Interrupt 0 Mask, default value: 0x00 */
1332 /* MDT Interrupt 1, default value: 0x00 */
1341 /* MDT Interrupt 1 Mask, default value: 0x00 */
1347 /* CBUS Connection Status, default value: 0x00 */
1355 /* CBUS Interrupt 1st, default value: 0x00 */
1366 /* CBUS Interrupt Mask 1st, default value: 0x00 */
1369 /* CBUS Interrupt 2nd, default value: 0x00 */
1376 /* CBUS Interrupt Mask 2nd, default value: 0x00 */
1379 /* CBUS DDC Abort Interrupt, default value: 0x00 */
1382 /* CBUS DDC Abort Interrupt Mask, default value: 0x00 */
1385 /* CBUS MSC Requester Abort Interrupt, default value: 0x00 */
1388 /* CBUS MSC Requester Abort Interrupt Mask, default value: 0x00 */
1391 /* CBUS MSC Responder Abort Interrupt, default value: 0x00 */
1394 /* CBUS MSC Responder Abort Interrupt Mask, default value: 0x00 */
1397 /* CBUS RX DISCOVERY interrupt, default value: 0x00 */
1400 /* CBUS RX DISCOVERY Interrupt Mask, default value: 0x00 */
1403 /* CBUS_Link_Layer Control #8, default value: 0x00 */
1406 /* MDT State Machine Status, default value: 0x00 */
1411 /* CBUS MSC command trigger, default value: 0x00 */
1420 /* CBUS MSC Command/Offset, default value: 0x00 */
1494 /* Discovery Status1, default value: 0x00 */
1499 /* Discovery Status2, default value: 0x00 */
1506 #define VAL_DISC_STAT2_DEFAULT			0x00
1512 #define VAL_RGND_OPEN				0x00
1517 /* Interrupt CBUS_reg1 INTR0, default value: 0x00 */
1529 /* Interrupt CBUS_reg1 INTR0 Mask, default value: 0x00 */