Lines Matching defs:map
80 struct regmap *map[I2C_NUM_ADDRESSES];
98 static int anx78xx_set_bits(struct regmap *map, u8 reg, u8 mask)
100 return regmap_update_bits(map, reg, mask, mask);
103 static int anx78xx_clear_bits(struct regmap *map, u8 reg, u8 mask)
105 return regmap_update_bits(map, reg, mask, 0);
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg);
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
163 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,
168 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_CHIP_CTRL_REG,
174 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
180 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
187 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
193 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
199 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_AUDVID_CTRL_REG,
204 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
209 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
215 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
221 err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_RX_P0],
248 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_ANALOG_CTRL0_REG,
256 err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P1],
272 err = regmap_update_bits(anx78xx->map[I2C_IDX_TX_P2],
279 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL3_REG,
284 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL4_REG,
289 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
294 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
300 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_MISC_CTRL_REG,
305 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],
311 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0],
332 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL2_REG,
338 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
343 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
349 err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_TX_P0],
355 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
360 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL8_REG,
369 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_HDCP_AUTO_TIMER_REG,
374 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
379 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
384 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2],
393 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_DEFER_CTRL_REG,
398 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
408 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
413 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
419 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
429 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
445 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_INT_CTRL_REG, 0x01);
449 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
454 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_MASK1_REG,
459 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_MASK1_REG,
495 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
497 anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
536 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
609 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,
614 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
635 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
640 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
654 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
690 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
698 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
715 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
719 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
725 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
744 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_LT_CTRL_REG,
756 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
762 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
782 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
787 err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P2],
793 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
798 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
965 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
1050 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1070 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
1099 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,
1109 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],
1141 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1151 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2],
1166 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,
1265 anx78xx->map[i] = devm_regmap_init_i2c(anx78xx->i2c_dummy[i],
1267 if (IS_ERR(anx78xx->map[i])) {
1268 err = PTR_ERR(anx78xx->map[i]);
1278 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDL_REG,
1283 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDH_REG,
1290 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_VERSION_REG,