Lines Matching defs:anx78xx

29 #include "analogix-anx78xx.h"
66 struct anx78xx {
88 static inline struct anx78xx *connector_to_anx78xx(struct drm_connector *c)
90 return container_of(c, struct anx78xx, connector);
93 static inline struct anx78xx *bridge_to_anx78xx(struct drm_bridge *bridge)
95 return container_of(bridge, struct anx78xx, bridge);
111 struct anx78xx *anx78xx = container_of(aux, struct anx78xx, aux);
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg);
115 static int anx78xx_set_hpd(struct anx78xx *anx78xx)
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
132 static int anx78xx_clear_hpd(struct anx78xx *anx78xx)
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
159 static int anx78xx_rx_initialization(struct anx78xx *anx78xx)
163 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,
168 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_CHIP_CTRL_REG,
174 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
180 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
187 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
193 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
199 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_AUDVID_CTRL_REG,
204 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0],
209 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0],
215 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
221 err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_RX_P0],
227 err = anx78xx_clear_hpd(anx78xx);
240 static int anx78xx_link_phy_initialization(struct anx78xx *anx78xx)
248 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_ANALOG_CTRL0_REG,
256 err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P1],
267 static int anx78xx_xtal_clk_sel(struct anx78xx *anx78xx)
272 err = regmap_update_bits(anx78xx->map[I2C_IDX_TX_P2],
279 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL3_REG,
284 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL4_REG,
289 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
294 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
300 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_MISC_CTRL_REG,
305 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],
311 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0],
327 static int anx78xx_tx_initialization(struct anx78xx *anx78xx)
332 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL2_REG,
338 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
343 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
349 err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_TX_P0],
355 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
360 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL8_REG,
369 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_HDCP_AUTO_TIMER_REG,
374 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
379 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
384 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2],
389 err = anx78xx_xtal_clk_sel(anx78xx);
393 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_DEFER_CTRL_REG,
398 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
408 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
413 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
419 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
424 err = anx78xx_link_phy_initialization(anx78xx);
429 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
437 static int anx78xx_enable_interrupts(struct anx78xx *anx78xx)
445 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_INT_CTRL_REG, 0x01);
449 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
454 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_MASK1_REG,
459 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_MASK1_REG,
467 static void anx78xx_poweron(struct anx78xx *anx78xx)
469 struct anx78xx_platform_data *pdata = &anx78xx->pdata;
472 if (WARN_ON(anx78xx->powered))
495 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
497 anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
500 anx78xx->powered = true;
503 static void anx78xx_poweroff(struct anx78xx *anx78xx)
505 struct anx78xx_platform_data *pdata = &anx78xx->pdata;
508 if (WARN_ON(!anx78xx->powered))
528 anx78xx->powered = false;
531 static int anx78xx_start(struct anx78xx *anx78xx)
536 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
541 err = anx78xx_enable_interrupts(anx78xx);
547 err = anx78xx_rx_initialization(anx78xx);
553 err = anx78xx_tx_initialization(anx78xx);
569 anx78xx_poweroff(anx78xx);
574 static int anx78xx_init_pdata(struct anx78xx *anx78xx)
576 struct anx78xx_platform_data *pdata = &anx78xx->pdata;
577 struct device *dev = &anx78xx->client->dev;
604 static int anx78xx_dp_link_training(struct anx78xx *anx78xx)
609 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG,
614 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
620 err = drm_dp_dpcd_readb(&anx78xx->aux, DP_MAX_LINK_RATE, &dp_bw);
635 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
640 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
646 err = drm_dp_dpcd_read(&anx78xx->aux, DP_DPCD_REV,
647 &anx78xx->dpcd, DP_RECEIVER_CAP_SIZE);
654 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
663 if (anx78xx->dpcd[DP_DPCD_REV] >= 0x11) {
664 err = drm_dp_dpcd_readb(&anx78xx->aux, DP_SET_POWER, &dpcd[0]);
674 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_SET_POWER, dpcd[0]);
690 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
695 if (anx78xx->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
698 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
703 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL,
708 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL, 0);
714 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd))
715 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
719 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
725 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
727 anx78xx->dpcd[DP_MAX_LINK_RATE]);
731 dpcd[1] = drm_dp_max_lane_count(anx78xx->dpcd);
733 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd))
736 err = drm_dp_dpcd_write(&anx78xx->aux, DP_LINK_BW_SET, dpcd,
744 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_LT_CTRL_REG,
752 static int anx78xx_config_dp_output(struct anx78xx *anx78xx)
756 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
762 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
770 static int anx78xx_send_video_infoframe(struct anx78xx *anx78xx,
782 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
787 err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P2],
793 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
798 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
806 static int anx78xx_get_downstream_info(struct anx78xx *anx78xx)
811 err = drm_dp_dpcd_readb(&anx78xx->aux, DP_SINK_COUNT, &value);
827 struct anx78xx *anx78xx = connector_to_anx78xx(connector);
830 if (WARN_ON(!anx78xx->powered))
833 if (anx78xx->edid)
834 return drm_add_edid_modes(connector, anx78xx->edid);
836 mutex_lock(&anx78xx->lock);
838 err = anx78xx_get_downstream_info(anx78xx);
844 anx78xx->edid = drm_get_edid(connector, &anx78xx->aux.ddc);
845 if (!anx78xx->edid) {
851 anx78xx->edid);
857 num_modes = drm_add_edid_modes(connector, anx78xx->edid);
860 mutex_unlock(&anx78xx->lock);
872 struct anx78xx *anx78xx = connector_to_anx78xx(connector);
874 if (!gpiod_get_value(anx78xx->pdata.gpiod_hpd))
892 struct anx78xx *anx78xx = bridge_to_anx78xx(bridge);
906 anx78xx->aux.name = "DP-AUX";
907 anx78xx->aux.dev = &anx78xx->client->dev;
908 anx78xx->aux.transfer = anx78xx_aux_transfer;
910 err = drm_dp_aux_register(&anx78xx->aux);
916 err = drm_connector_init(bridge->dev, &anx78xx->connector,
924 drm_connector_helper_add(&anx78xx->connector,
927 err = drm_connector_register(&anx78xx->connector);
933 anx78xx->connector.polled = DRM_CONNECTOR_POLL_HPD;
935 err = drm_connector_attach_encoder(&anx78xx->connector,
962 struct anx78xx *anx78xx = bridge_to_anx78xx(bridge);
965 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
973 struct anx78xx *anx78xx = bridge_to_anx78xx(bridge);
977 if (WARN_ON(!anx78xx->powered))
980 mutex_lock(&anx78xx->lock);
983 &anx78xx->connector,
990 err = anx78xx_send_video_infoframe(anx78xx, &frame);
995 mutex_unlock(&anx78xx->lock);
1000 struct anx78xx *anx78xx = bridge_to_anx78xx(bridge);
1003 err = anx78xx_start(anx78xx);
1009 err = anx78xx_set_hpd(anx78xx);
1024 struct anx78xx *anx78xx = data;
1027 if (anx78xx->powered)
1030 mutex_lock(&anx78xx->lock);
1033 anx78xx_poweron(anx78xx);
1035 err = anx78xx_enable_interrupts(anx78xx);
1039 mutex_unlock(&anx78xx->lock);
1044 static int anx78xx_handle_dp_int_1(struct anx78xx *anx78xx, u8 irq)
1050 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1057 err = anx78xx_config_dp_output(anx78xx);
1063 static bool anx78xx_handle_common_int_4(struct anx78xx *anx78xx, u8 irq)
1070 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
1080 anx78xx_poweroff(anx78xx);
1082 kfree(anx78xx->edid);
1083 anx78xx->edid = NULL;
1092 static void anx78xx_handle_hdmi_int_1(struct anx78xx *anx78xx, u8 irq)
1099 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,
1109 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0],
1126 err = anx78xx_dp_link_training(anx78xx);
1134 struct anx78xx *anx78xx = data;
1139 mutex_lock(&anx78xx->lock);
1141 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1149 anx78xx_handle_dp_int_1(anx78xx, irq);
1151 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2],
1160 event = anx78xx_handle_common_int_4(anx78xx, irq);
1163 if (!anx78xx->powered)
1166 err = regmap_read(anx78xx->map[I2C_IDX_RX_P0], SP_INT_STATUS1_REG,
1174 anx78xx_handle_hdmi_int_1(anx78xx, irq);
1177 mutex_unlock(&anx78xx->lock);
1180 drm_helper_hpd_irq_event(anx78xx->connector.dev);
1185 static void unregister_i2c_dummy_clients(struct anx78xx *anx78xx)
1189 for (i = 0; i < ARRAY_SIZE(anx78xx->i2c_dummy); i++)
1190 i2c_unregister_device(anx78xx->i2c_dummy[i]);
1208 struct anx78xx *anx78xx;
1215 anx78xx = devm_kzalloc(&client->dev, sizeof(*anx78xx), GFP_KERNEL);
1216 if (!anx78xx)
1219 pdata = &anx78xx->pdata;
1221 mutex_init(&anx78xx->lock);
1224 anx78xx->bridge.of_node = client->dev.of_node;
1227 anx78xx->client = client;
1228 i2c_set_clientdata(client, anx78xx);
1230 err = anx78xx_init_pdata(anx78xx);
1264 anx78xx->i2c_dummy[i] = i2c_dummy;
1265 anx78xx->map[i] = devm_regmap_init_i2c(anx78xx->i2c_dummy[i],
1267 if (IS_ERR(anx78xx->map[i])) {
1268 err = PTR_ERR(anx78xx->map[i]);
1276 anx78xx_poweron(anx78xx);
1278 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDL_REG,
1283 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDH_REG,
1288 anx78xx->chipid = (u8)idl | ((u8)idh << 8);
1290 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_VERSION_REG,
1296 if (anx78xx->chipid == anx78xx_chipid_list[i]) {
1298 anx78xx->chipid, version);
1306 anx78xx->chipid, version);
1314 "anx78xx-hpd", anx78xx);
1324 "anx78xx-intp", anx78xx);
1330 anx78xx->bridge.funcs = &anx78xx_bridge_funcs;
1332 drm_bridge_add(&anx78xx->bridge);
1335 if (!gpiod_get_value(anx78xx->pdata.gpiod_hpd))
1336 anx78xx_poweroff(anx78xx);
1341 anx78xx_poweroff(anx78xx);
1344 unregister_i2c_dummy_clients(anx78xx);
1350 struct anx78xx *anx78xx = i2c_get_clientdata(client);
1352 drm_bridge_remove(&anx78xx->bridge);
1354 unregister_i2c_dummy_clients(anx78xx);
1356 kfree(anx78xx->edid);