Lines Matching refs:bochs
10 #include "bochs.h"
14 static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
19 if (bochs->mmio) {
21 writeb(val, bochs->mmio + offset);
27 static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
31 if (bochs->mmio) {
33 ret = readw(bochs->mmio + offset);
41 static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
43 if (bochs->mmio) {
45 writew(val, bochs->mmio + offset);
52 static void bochs_hw_set_big_endian(struct bochs_device *bochs)
54 if (bochs->qext_size < 8)
57 writel(0xbebebebe, bochs->mmio + 0x604);
60 static void bochs_hw_set_little_endian(struct bochs_device *bochs)
62 if (bochs->qext_size < 8)
65 writel(0x1e1e1e1e, bochs->mmio + 0x604);
77 struct bochs_device *bochs = data;
84 buf[i] = readb(bochs->mmio + start + i);
89 int bochs_hw_load_edid(struct bochs_device *bochs)
93 if (!bochs->mmio)
97 bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
101 kfree(bochs->edid);
102 bochs->edid = drm_do_get_edid(&bochs->connector,
103 bochs_get_edid_block, bochs);
104 if (bochs->edid == NULL)
112 struct bochs_device *bochs = dev->dev_private;
118 /* mmio bar with vga and bochs registers present */
119 if (pci_request_region(pdev, 2, "bochs-drm") != 0) {
125 bochs->mmio = ioremap(ioaddr, iosize);
126 if (bochs->mmio == NULL) {
133 if (!request_region(ioaddr, iosize, "bochs-drm")) {
137 bochs->ioports = 1;
140 id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
141 mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
155 DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n",
160 if (pci_request_region(pdev, 0, "bochs-drm") != 0)
163 bochs->fb_map = ioremap(addr, size);
164 if (bochs->fb_map == NULL) {
168 bochs->fb_base = addr;
169 bochs->fb_size = size;
171 DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);
174 bochs->ioports ? "ioports" : "mmio",
177 if (bochs->mmio && pdev->revision >= 2) {
178 bochs->qext_size = readl(bochs->mmio + 0x600);
179 if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
180 bochs->qext_size = 0;
184 bochs->qext_size);
185 bochs_hw_set_native_endian(bochs);
194 struct bochs_device *bochs = dev->dev_private;
198 if (bochs->mmio)
199 iounmap(bochs->mmio);
200 if (bochs->ioports)
202 if (bochs->fb_map)
203 iounmap(bochs->fb_map);
205 kfree(bochs->edid);
208 void bochs_hw_setmode(struct bochs_device *bochs,
213 if (!drm_dev_enter(bochs->dev, &idx))
216 bochs->xres = mode->hdisplay;
217 bochs->yres = mode->vdisplay;
218 bochs->bpp = 32;
219 bochs->stride = mode->hdisplay * (bochs->bpp / 8);
220 bochs->yres_virtual = bochs->fb_size / bochs->stride;
223 bochs->xres, bochs->yres, bochs->bpp,
224 bochs->yres_virtual);
226 bochs_vga_writeb(bochs, 0x3c0, 0x20); /* unblank */
228 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 0);
229 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp);
230 bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES, bochs->xres);
231 bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES, bochs->yres);
232 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK, 0);
233 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, bochs->xres);
234 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
235 bochs->yres_virtual);
236 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, 0);
237 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, 0);
239 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
245 void bochs_hw_setformat(struct bochs_device *bochs,
250 if (!drm_dev_enter(bochs->dev, &idx))
261 bochs_hw_set_little_endian(bochs);
264 bochs_hw_set_big_endian(bochs);
276 void bochs_hw_setbase(struct bochs_device *bochs,
282 if (!drm_dev_enter(bochs->dev, &idx))
285 bochs->stride = stride;
287 y * bochs->stride +
288 x * (bochs->bpp / 8);
289 vy = offset / bochs->stride;
290 vx = (offset % bochs->stride) * 8 / bochs->bpp;
291 vwidth = stride * 8 / bochs->bpp;
295 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
296 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
297 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);