Lines Matching refs:base
43 void __iomem *base;
57 gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
59 writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
76 gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
78 writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
81 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
83 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
93 return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset));
101 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
103 writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
120 gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);
121 gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);
122 gpioi_epos = readw_relaxed(chip->base + ZX_GPIO_IEP);
123 gpioi_eneg = readw_relaxed(chip->base + ZX_GPIO_IEN);
147 writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);
148 writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);
149 writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);
150 writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);
166 pending = readw_relaxed(chip->base + ZX_GPIO_MIS);
167 writew_relaxed(pending, chip->base + ZX_GPIO_IC);
185 gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;
186 writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
187 gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;
188 writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
200 gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;
201 writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
202 gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;
203 writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
225 chip->base = devm_platform_ioremap_resource(pdev, 0);
226 if (IS_ERR(chip->base))
227 return PTR_ERR(chip->base);
238 chip->gc.base = ZX_GPIO_NR * id;
247 writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);
248 writew_relaxed(0, chip->base + ZX_GPIO_IE);