Lines Matching refs:pin
114 unsigned int pin;
116 pin = GPIO_PIN_OF_IRQ(d->irq);
117 giu_clear(GIUINTENL, 1 << pin);
118 giu_write(GIUINTSTATL, 1 << pin);
172 unsigned int pin;
174 pin = GPIO_PIN_OF_IRQ(d->irq) - GIUINT_HIGH_OFFSET;
175 giu_clear(GIUINTENH, 1 << pin);
176 giu_write(GIUINTSTATH, 1 << pin);
223 void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger,
228 if (pin < GIUINT_HIGH_OFFSET) {
229 mask = 1 << pin;
252 irq_set_chip_and_handler(GIU_IRQ(pin),
258 irq_set_chip_and_handler(GIU_IRQ(pin),
263 } else if (pin < GIUINT_HIGH_MAX) {
264 mask = 1 << (pin - GIUINT_HIGH_OFFSET);
287 irq_set_chip_and_handler(GIU_IRQ(pin),
293 irq_set_chip_and_handler(GIU_IRQ(pin),
302 void vr41xx_set_irq_level(unsigned int pin, irq_level_t level)
306 if (pin < GIUINT_HIGH_OFFSET) {
307 mask = 1 << pin;
313 } else if (pin < GIUINT_HIGH_MAX) {
314 mask = 1 << (pin - GIUINT_HIGH_OFFSET);
324 static int giu_set_direction(struct gpio_chip *chip, unsigned pin, int dir)
329 if (pin >= chip->ngpio)
332 if (pin < 16) {
334 mask = 1 << pin;
335 } else if (pin < 32) {
337 mask = 1 << (pin - 16);
341 mask = 1 << (pin - 32);
343 switch (pin) {
372 static int vr41xx_gpio_get(struct gpio_chip *chip, unsigned pin)
376 if (pin >= chip->ngpio)
379 if (pin < 16) {
381 mask = 1 << pin;
382 } else if (pin < 32) {
384 mask = 1 << (pin - 16);
385 } else if (pin < 48) {
387 mask = 1 << (pin - 32);
390 mask = 1 << (pin - 48);
399 static void vr41xx_gpio_set(struct gpio_chip *chip, unsigned pin,
405 if (pin >= chip->ngpio)
408 if (pin < 16) {
410 mask = 1 << pin;
411 } else if (pin < 32) {
413 mask = 1 << (pin - 16);
414 } else if (pin < 48) {
416 mask = 1 << (pin - 32);
419 mask = 1 << (pin - 48);
468 unsigned int trigger, i, pin;
504 pin = GPIO_PIN_OF_IRQ(i);
505 if (pin < GIUINT_HIGH_OFFSET)
510 if (trigger & (1 << pin))