Lines Matching defs:tgpio
45 struct timbgpio *tgpio = gpiochip_get_data(gpio);
49 spin_lock_irqsave(&tgpio->lock, flags);
50 reg = ioread32(tgpio->membase + offset);
57 iowrite32(reg, tgpio->membase + offset);
58 spin_unlock_irqrestore(&tgpio->lock, flags);
70 struct timbgpio *tgpio = gpiochip_get_data(gpio);
73 value = ioread32(tgpio->membase + TGPIOVAL);
91 struct timbgpio *tgpio = gpiochip_get_data(gpio);
93 if (tgpio->irq_base <= 0)
96 return tgpio->irq_base + offset;
104 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
105 int offset = d->irq - tgpio->irq_base;
108 spin_lock_irqsave(&tgpio->lock, flags);
109 tgpio->last_ier &= ~(1UL << offset);
110 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
111 spin_unlock_irqrestore(&tgpio->lock, flags);
116 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
117 int offset = d->irq - tgpio->irq_base;
120 spin_lock_irqsave(&tgpio->lock, flags);
121 tgpio->last_ier |= 1UL << offset;
122 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
123 spin_unlock_irqrestore(&tgpio->lock, flags);
128 struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);
129 int offset = d->irq - tgpio->irq_base;
135 if (offset < 0 || offset > tgpio->gpio.ngpio)
138 ver = ioread32(tgpio->membase + TGPIO_VER);
140 spin_lock_irqsave(&tgpio->lock, flags);
142 lvr = ioread32(tgpio->membase + TGPIO_LVR);
143 flr = ioread32(tgpio->membase + TGPIO_FLR);
145 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
173 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
174 iowrite32(flr, tgpio->membase + TGPIO_FLR);
176 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
178 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
181 spin_unlock_irqrestore(&tgpio->lock, flags);
187 struct timbgpio *tgpio = irq_desc_get_handler_data(desc);
193 ipr = ioread32(tgpio->membase + TGPIO_IPR);
194 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
200 iowrite32(0, tgpio->membase + TGPIO_IER);
202 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
203 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
205 iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);
220 struct timbgpio *tgpio;
229 tgpio = devm_kzalloc(dev, sizeof(*tgpio), GFP_KERNEL);
230 if (!tgpio)
233 tgpio->irq_base = pdata->irq_base;
235 spin_lock_init(&tgpio->lock);
237 tgpio->membase = devm_platform_ioremap_resource(pdev, 0);
238 if (IS_ERR(tgpio->membase))
239 return PTR_ERR(tgpio->membase);
241 gc = &tgpio->gpio;
250 gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
256 err = devm_gpiochip_add_data(&pdev->dev, gc, tgpio);
260 platform_set_drvdata(pdev, tgpio);
263 iowrite32(0x0, tgpio->membase + TGPIO_IER);
265 if (irq < 0 || tgpio->irq_base <= 0)
269 irq_set_chip_and_handler(tgpio->irq_base + i,
271 irq_set_chip_data(tgpio->irq_base + i, tgpio);
272 irq_clear_status_flags(tgpio->irq_base + i, IRQ_NOREQUEST | IRQ_NOPROBE);
275 irq_set_chained_handler_and_data(irq, timbgpio_irq, tgpio);