Lines Matching refs:line
50 unsigned int line;
57 struct msix_entry *msix_entries; /* per line MSI-X */
58 struct thunderx_line *line_entries; /* per line irq info */
65 static unsigned int bit_cfg_reg(unsigned int line)
67 return 8 * line + GPIO_BIT_CFG;
70 static unsigned int intr_reg(unsigned int line)
72 return 8 * line + GPIO_INTR;
76 unsigned int line)
78 u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
88 unsigned int line)
90 bool rv = thunderx_gpio_is_gpio_nowarn(txgpio, line);
92 WARN_RATELIMIT(!rv, "Pin %d not available for GPIO\n", line);
97 static int thunderx_gpio_request(struct gpio_chip *chip, unsigned int line)
101 return thunderx_gpio_is_gpio(txgpio, line) ? 0 : -EIO;
104 static int thunderx_gpio_dir_in(struct gpio_chip *chip, unsigned int line)
108 if (!thunderx_gpio_is_gpio(txgpio, line))
112 clear_bit(line, txgpio->invert_mask);
113 clear_bit(line, txgpio->od_mask);
114 writeq(txgpio->line_entries[line].fil_bits,
115 txgpio->register_base + bit_cfg_reg(line));
120 static void thunderx_gpio_set(struct gpio_chip *chip, unsigned int line,
124 int bank = line / 64;
125 int bank_bit = line % 64;
133 static int thunderx_gpio_dir_out(struct gpio_chip *chip, unsigned int line,
137 u64 bit_cfg = txgpio->line_entries[line].fil_bits | GPIO_BIT_CFG_TX_OE;
139 if (!thunderx_gpio_is_gpio(txgpio, line))
144 thunderx_gpio_set(chip, line, value);
146 if (test_bit(line, txgpio->invert_mask))
149 if (test_bit(line, txgpio->od_mask))
152 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
158 static int thunderx_gpio_get_direction(struct gpio_chip *chip, unsigned int line)
163 if (!thunderx_gpio_is_gpio_nowarn(txgpio, line))
171 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
180 unsigned int line,
186 int bank = line / 64;
187 int bank_bit = line % 64;
192 if (!thunderx_gpio_is_gpio(txgpio, line))
196 orig_invert = test_bit(line, txgpio->invert_mask);
198 orig_od = test_bit(line, txgpio->od_mask);
201 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
209 set_bit(line, txgpio->invert_mask);
211 set_bit(line, txgpio->od_mask);
216 clear_bit(line, txgpio->invert_mask);
218 clear_bit(line, txgpio->od_mask);
235 txgpio->line_entries[line].fil_bits =
239 bit_cfg |= txgpio->line_entries[line].fil_bits;
240 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
254 ret = thunderx_gpio_dir_out(chip, line, orig_dat ^ new_invert);
259 static int thunderx_gpio_get(struct gpio_chip *chip, unsigned int line)
262 int bank = line / 64;
263 int bank_bit = line % 64;
267 if (test_bit(line, txgpio->invert_mask))
348 set_bit(txline->line, txgpio->invert_mask);
350 clear_bit(txline->line, txgpio->invert_mask);
352 clear_bit(txline->line, txgpio->od_mask);
353 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));
497 txgpio->line_entries[i].line = i;
547 /* Push on irq_data and the domain for each line. */