Lines Matching defs:txgpio
49 struct thunderx_gpio *txgpio;
75 static bool thunderx_gpio_is_gpio_nowarn(struct thunderx_gpio *txgpio,
78 u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
87 static bool thunderx_gpio_is_gpio(struct thunderx_gpio *txgpio,
90 bool rv = thunderx_gpio_is_gpio_nowarn(txgpio, line);
99 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
101 return thunderx_gpio_is_gpio(txgpio, line) ? 0 : -EIO;
106 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
108 if (!thunderx_gpio_is_gpio(txgpio, line))
111 raw_spin_lock(&txgpio->lock);
112 clear_bit(line, txgpio->invert_mask);
113 clear_bit(line, txgpio->od_mask);
114 writeq(txgpio->line_entries[line].fil_bits,
115 txgpio->register_base + bit_cfg_reg(line));
116 raw_spin_unlock(&txgpio->lock);
123 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
127 void __iomem *reg = txgpio->register_base +
136 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
137 u64 bit_cfg = txgpio->line_entries[line].fil_bits | GPIO_BIT_CFG_TX_OE;
139 if (!thunderx_gpio_is_gpio(txgpio, line))
142 raw_spin_lock(&txgpio->lock);
146 if (test_bit(line, txgpio->invert_mask))
149 if (test_bit(line, txgpio->od_mask))
152 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
154 raw_spin_unlock(&txgpio->lock);
160 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
163 if (!thunderx_gpio_is_gpio_nowarn(txgpio, line))
171 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
189 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
190 void __iomem *reg = txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET;
192 if (!thunderx_gpio_is_gpio(txgpio, line))
195 raw_spin_lock(&txgpio->lock);
196 orig_invert = test_bit(line, txgpio->invert_mask);
198 orig_od = test_bit(line, txgpio->od_mask);
201 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
209 set_bit(line, txgpio->invert_mask);
211 set_bit(line, txgpio->od_mask);
216 clear_bit(line, txgpio->invert_mask);
218 clear_bit(line, txgpio->od_mask);
235 txgpio->line_entries[line].fil_bits =
239 bit_cfg |= txgpio->line_entries[line].fil_bits;
240 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
246 raw_spin_unlock(&txgpio->lock);
261 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
264 u64 read_bits = readq(txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_RX_DAT);
267 if (test_bit(line, txgpio->invert_mask))
279 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
284 writeq(set_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET);
285 writeq(clear_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_CLR);
292 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
295 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
301 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
304 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
310 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
313 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
319 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
322 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
329 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
331 &txgpio->line_entries[irqd_to_hwirq(d)];
345 raw_spin_lock(&txgpio->lock);
348 set_bit(txline->line, txgpio->invert_mask);
350 clear_bit(txline->line, txgpio->invert_mask);
352 clear_bit(txline->line, txgpio->od_mask);
353 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));
354 raw_spin_unlock(&txgpio->lock);
398 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
402 irq = txgpio->msix_entries[child].vector;
430 struct thunderx_gpio *txgpio;
436 txgpio = devm_kzalloc(dev, sizeof(*txgpio), GFP_KERNEL);
437 if (!txgpio)
440 raw_spin_lock_init(&txgpio->lock);
441 chip = &txgpio->chip;
443 pci_set_drvdata(pdev, txgpio);
458 txgpio->register_base = tbl[0];
459 if (!txgpio->register_base) {
468 txgpio->base_msi = 48;
470 u64 c = readq(txgpio->register_base + GPIO_CONST);
473 txgpio->base_msi = (c >> 8) & 0xff;
476 txgpio->msix_entries = devm_kcalloc(dev,
479 if (!txgpio->msix_entries) {
484 txgpio->line_entries = devm_kcalloc(dev,
488 if (!txgpio->line_entries) {
494 u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(i));
496 txgpio->msix_entries[i].entry = txgpio->base_msi + (2 * i);
497 txgpio->line_entries[i].line = i;
498 txgpio->line_entries[i].txgpio = txgpio;
504 txgpio->line_entries[i].fil_bits = bit_cfg ?
508 set_bit(i, txgpio->od_mask);
510 set_bit(i, txgpio->invert_mask);
515 err = pci_enable_msix_range(pdev, txgpio->msix_entries, ngpio, ngpio);
537 irq_get_irq_data(txgpio->msix_entries[0].vector)->domain;
543 err = devm_gpiochip_add_data(dev, chip, txgpio);
556 txgpio->msix_entries[i].vector,
573 struct thunderx_gpio *txgpio = pci_get_drvdata(pdev);
575 for (i = 0; i < txgpio->chip.ngpio; i++)
576 irq_domain_pop_irq(txgpio->chip.irq.domain,
577 txgpio->msix_entries[i].vector);
579 irq_domain_remove(txgpio->chip.irq.domain);