Lines Matching refs:sa1100_gpio_chip
16 struct sa1100_gpio_chip {
26 #define sa1100_gpio_chip(x) container_of(x, struct sa1100_gpio_chip, chip)
41 return readl_relaxed(sa1100_gpio_chip(chip)->membase + R_GPLR) &
49 writel_relaxed(BIT(offset), sa1100_gpio_chip(chip)->membase + reg);
54 void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;
64 void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;
76 void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;
89 return sa1100_gpio_chip(chip)->irqbase + offset;
92 static struct sa1100_gpio_chip sa1100_gpio_chip = {
113 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)
127 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
155 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
162 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
172 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
182 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
208 struct sa1100_gpio_chip *sgc = d->host_data;
231 struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);
257 struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;
276 sa1100_update_edge_regs(&sa1100_gpio_chip);
311 struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;
319 gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);