Lines Matching defs:sgc
113 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)
115 void *base = sgc->membase;
118 grer = sgc->irqrising & sgc->irqmask;
119 gfer = sgc->irqfalling & sgc->irqmask;
127 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
131 if ((sgc->irqrising | sgc->irqfalling) & mask)
137 sgc->irqrising |= mask;
139 sgc->irqrising &= ~mask;
141 sgc->irqfalling |= mask;
143 sgc->irqfalling &= ~mask;
145 sa1100_update_edge_regs(sgc);
155 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
157 writel_relaxed(BIT(d->hwirq), sgc->membase + R_GEDR);
162 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
165 sgc->irqmask &= ~mask;
167 sa1100_update_edge_regs(sgc);
172 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
175 sgc->irqmask |= mask;
177 sa1100_update_edge_regs(sgc);
182 struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);
186 sgc->irqwake |= BIT(d->hwirq);
188 sgc->irqwake &= ~BIT(d->hwirq);
208 struct sa1100_gpio_chip *sgc = d->host_data;
210 irq_set_chip_data(irq, sgc);
231 struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);
233 void __iomem *gedr = sgc->membase + R_GEDR;
243 irq = sgc->irqbase;
257 struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;
262 writel_relaxed(sgc->irqwake & sgc->irqrising, sgc->membase + R_GRER);
263 writel_relaxed(sgc->irqwake & sgc->irqfalling, sgc->membase + R_GFER);
268 writel_relaxed(readl_relaxed(sgc->membase + R_GEDR),
269 sgc->membase + R_GEDR);
311 struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;
315 writel_relaxed(0, sgc->membase + R_GFER);
316 writel_relaxed(0, sgc->membase + R_GRER);
317 writel_relaxed(-1, sgc->membase + R_GEDR);
323 &sa1100_gpio_irqdomain_ops, sgc);
327 sa1100_gpio_handler, sgc);