Lines Matching defs:idio16gpio
84 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
88 return !!(ioread8(&idio16gpio->reg->out0_7) & mask);
91 return !!(ioread8(&idio16gpio->reg->out8_15) & (mask >> 8));
94 return !!(ioread8(&idio16gpio->reg->in0_7) & (mask >> 16));
96 return !!(ioread8(&idio16gpio->reg->in8_15) & (mask >> 24));
102 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
106 &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15,
107 &idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15,
128 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
139 base = &idio16gpio->reg->out8_15;
141 base = &idio16gpio->reg->out0_7;
143 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
152 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
158 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
162 &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15,
176 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
182 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
193 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
197 idio16gpio->irq_mask &= ~mask;
199 if (!idio16gpio->irq_mask) {
200 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
202 iowrite8(0, &idio16gpio->reg->irq_ctl);
204 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
211 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
213 const unsigned long prev_irq_mask = idio16gpio->irq_mask;
216 idio16gpio->irq_mask |= mask;
219 raw_spin_lock_irqsave(&idio16gpio->lock, flags);
221 ioread8(&idio16gpio->reg->irq_ctl);
223 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
247 struct idio_16_gpio *const idio16gpio = dev_id;
249 struct gpio_chip *const chip = &idio16gpio->chip;
252 raw_spin_lock(&idio16gpio->lock);
254 irq_status = ioread8(&idio16gpio->reg->irq_status);
256 raw_spin_unlock(&idio16gpio->lock);
262 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
265 raw_spin_lock(&idio16gpio->lock);
268 iowrite8(0, &idio16gpio->reg->in0_7);
270 raw_spin_unlock(&idio16gpio->lock);
285 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(gc);
288 iowrite8(0, &idio16gpio->reg->irq_ctl);
289 iowrite8(0, &idio16gpio->reg->in0_7);
297 struct idio_16_gpio *idio16gpio;
303 idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL);
304 if (!idio16gpio)
319 idio16gpio->reg = pcim_iomap_table(pdev)[pci_bar_index];
322 iowrite8(0, &idio16gpio->reg->filter_ctl);
324 idio16gpio->chip.label = name;
325 idio16gpio->chip.parent = dev;
326 idio16gpio->chip.owner = THIS_MODULE;
327 idio16gpio->chip.base = -1;
328 idio16gpio->chip.ngpio = IDIO_16_NGPIO;
329 idio16gpio->chip.names = idio_16_names;
330 idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
331 idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
332 idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
333 idio16gpio->chip.get = idio_16_gpio_get;
334 idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple;
335 idio16gpio->chip.set = idio_16_gpio_set;
336 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
338 girq = &idio16gpio->chip.irq;
348 raw_spin_lock_init(&idio16gpio->lock);
350 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio);
357 name, idio16gpio);