Lines Matching defs:mpc8xxx_gc
68 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
71 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR);
72 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask;
81 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
86 return mpc8xxx_gc->direction_output(gc, gpio, val);
92 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
97 return mpc8xxx_gc->direction_output(gc, gpio, val);
102 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
104 if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS)
105 return irq_create_mapping(mpc8xxx_gc->irq, offset);
112 struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
113 struct gpio_chip *gc = &mpc8xxx_gc->gc;
117 mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
118 & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
120 generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 31 - i));
127 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
128 struct gpio_chip *gc = &mpc8xxx_gc->gc;
131 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
133 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
134 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
137 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
142 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
143 struct gpio_chip *gc = &mpc8xxx_gc->gc;
146 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
148 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
149 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
152 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
157 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
158 struct gpio_chip *gc = &mpc8xxx_gc->gc;
160 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER,
166 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
167 struct gpio_chip *gc = &mpc8xxx_gc->gc;
173 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
174 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
175 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
177 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
181 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
182 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
183 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
185 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
197 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
198 struct gpio_chip *gc = &mpc8xxx_gc->gc;
205 reg = mpc8xxx_gc->regs + GPIO_ICR;
208 reg = mpc8xxx_gc->regs + GPIO_ICR2;
215 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
218 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
223 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
226 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
230 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
232 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
305 struct mpc8xxx_gpio_chip *mpc8xxx_gc;
311 mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);
312 if (!mpc8xxx_gc)
315 platform_set_drvdata(pdev, mpc8xxx_gc);
317 raw_spin_lock_init(&mpc8xxx_gc->lock);
319 mpc8xxx_gc->regs = of_iomap(np, 0);
320 if (!mpc8xxx_gc->regs)
323 gc = &mpc8xxx_gc->gc;
328 mpc8xxx_gc->regs + GPIO_DAT,
330 mpc8xxx_gc->regs + GPIO_DIR, NULL,
337 mpc8xxx_gc->regs + GPIO_DAT,
339 mpc8xxx_gc->regs + GPIO_DIR, NULL,
347 mpc8xxx_gc->direction_output = gc->direction_output;
376 gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0xffffffff);
378 ret = devm_gpiochip_add_data(&pdev->dev, gc, mpc8xxx_gc);
385 mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0);
386 if (!mpc8xxx_gc->irqn)
389 mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,
390 &mpc8xxx_gpio_irq_ops, mpc8xxx_gc);
391 if (!mpc8xxx_gc->irq)
395 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
396 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
398 ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn,
401 mpc8xxx_gc);
404 np->full_name, mpc8xxx_gc->irqn, ret);
410 if (mpc8xxx_gc->irq)
411 irq_domain_remove(mpc8xxx_gc->irq);
412 iounmap(mpc8xxx_gc->regs);
418 struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev);
420 if (mpc8xxx_gc->irq) {
421 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL);
422 irq_domain_remove(mpc8xxx_gc->irq);
425 iounmap(mpc8xxx_gc->regs);