Lines Matching refs:gc
125 static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line)
127 if (gc->be_bits)
128 return BIT(gc->bgpio_bits - 1 - line);
132 static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)
134 unsigned long pinmask = bgpio_line2mask(gc, gpio);
135 bool dir = !!(gc->bgpio_dir & pinmask);
138 return !!(gc->read_reg(gc->reg_set) & pinmask);
140 return !!(gc->read_reg(gc->reg_dat) & pinmask);
147 static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask,
156 set_mask = *mask & gc->bgpio_dir;
157 get_mask = *mask & ~gc->bgpio_dir;
160 *bits |= gc->read_reg(gc->reg_set) & set_mask;
162 *bits |= gc->read_reg(gc->reg_dat) & get_mask;
167 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
169 return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio));
175 static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
180 *bits |= gc->read_reg(gc->reg_dat) & *mask;
187 static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask,
198 for_each_set_bit(bit, mask, gc->ngpio)
199 readmask |= bgpio_line2mask(gc, bit);
202 val = gc->read_reg(gc->reg_dat) & readmask;
208 for_each_set_bit(bit, &val, gc->ngpio)
209 *bits |= bgpio_line2mask(gc, bit);
214 static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)
218 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
220 unsigned long mask = bgpio_line2mask(gc, gpio);
223 spin_lock_irqsave(&gc->bgpio_lock, flags);
226 gc->bgpio_data |= mask;
228 gc->bgpio_data &= ~mask;
230 gc->write_reg(gc->reg_dat, gc->bgpio_data);
232 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
235 static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
238 unsigned long mask = bgpio_line2mask(gc, gpio);
241 gc->write_reg(gc->reg_set, mask);
243 gc->write_reg(gc->reg_clr, mask);
246 static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
248 unsigned long mask = bgpio_line2mask(gc, gpio);
251 spin_lock_irqsave(&gc->bgpio_lock, flags);
254 gc->bgpio_data |= mask;
256 gc->bgpio_data &= ~mask;
258 gc->write_reg(gc->reg_set, gc->bgpio_data);
260 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
263 static void bgpio_multiple_get_masks(struct gpio_chip *gc,
273 for_each_set_bit(i, mask, gc->bgpio_bits) {
275 *set_mask |= bgpio_line2mask(gc, i);
277 *clear_mask |= bgpio_line2mask(gc, i);
281 static void bgpio_set_multiple_single_reg(struct gpio_chip *gc,
289 spin_lock_irqsave(&gc->bgpio_lock, flags);
291 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
293 gc->bgpio_data |= set_mask;
294 gc->bgpio_data &= ~clear_mask;
296 gc->write_reg(reg, gc->bgpio_data);
298 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
301 static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
304 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
307 static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask,
310 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
313 static void bgpio_set_multiple_with_clear(struct gpio_chip *gc,
319 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
322 gc->write_reg(gc->reg_set, set_mask);
324 gc->write_reg(gc->reg_clr, clear_mask);
327 static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
332 static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio,
338 static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
341 gc->set(gc, gpio, val);
346 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
350 spin_lock_irqsave(&gc->bgpio_lock, flags);
352 gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
354 if (gc->reg_dir_in)
355 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
356 if (gc->reg_dir_out)
357 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
359 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
364 static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
367 if (gc->bgpio_dir_unreadable) {
368 if (gc->bgpio_dir & bgpio_line2mask(gc, gpio))
373 if (gc->reg_dir_out) {
374 if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio))
379 if (gc->reg_dir_in)
380 if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio)))
386 static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
390 spin_lock_irqsave(&gc->bgpio_lock, flags);
392 gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
394 if (gc->reg_dir_in)
395 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
396 if (gc->reg_dir_out)
397 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
399 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
402 static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
405 bgpio_dir_out(gc, gpio, val);
406 gc->set(gc, gpio, val);
410 static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio,
413 gc->set(gc, gpio, val);
414 bgpio_dir_out(gc, gpio, val);
419 struct gpio_chip *gc,
423 switch (gc->bgpio_bits) {
425 gc->read_reg = bgpio_read8;
426 gc->write_reg = bgpio_write8;
430 gc->read_reg = bgpio_read16be;
431 gc->write_reg = bgpio_write16be;
433 gc->read_reg = bgpio_read16;
434 gc->write_reg = bgpio_write16;
439 gc->read_reg = bgpio_read32be;
440 gc->write_reg = bgpio_write32be;
442 gc->read_reg = bgpio_read32;
443 gc->write_reg = bgpio_write32;
453 gc->read_reg = bgpio_read64;
454 gc->write_reg = bgpio_write64;
459 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);
488 static int bgpio_setup_io(struct gpio_chip *gc,
495 gc->reg_dat = dat;
496 if (!gc->reg_dat)
500 gc->reg_set = set;
501 gc->reg_clr = clr;
502 gc->set = bgpio_set_with_clear;
503 gc->set_multiple = bgpio_set_multiple_with_clear;
505 gc->reg_set = set;
506 gc->set = bgpio_set_set;
507 gc->set_multiple = bgpio_set_multiple_set;
509 gc->set = bgpio_set_none;
510 gc->set_multiple = NULL;
512 gc->set = bgpio_set;
513 gc->set_multiple = bgpio_set_multiple;
518 gc->get = bgpio_get_set;
519 if (!gc->be_bits)
520 gc->get_multiple = bgpio_get_set_multiple;
529 gc->get = bgpio_get;
530 if (gc->be_bits)
531 gc->get_multiple = bgpio_get_multiple_be;
533 gc->get_multiple = bgpio_get_multiple;
539 static int bgpio_setup_direction(struct gpio_chip *gc,
545 gc->reg_dir_out = dirout;
546 gc->reg_dir_in = dirin;
548 gc->direction_output = bgpio_dir_out_dir_first;
550 gc->direction_output = bgpio_dir_out_val_first;
551 gc->direction_input = bgpio_dir_in;
552 gc->get_direction = bgpio_get_dir;
555 gc->direction_output = bgpio_dir_out_err;
557 gc->direction_output = bgpio_simple_dir_out;
558 gc->direction_input = bgpio_simple_dir_in;
574 * @gc: the GPIO chip to set up
599 int bgpio_init(struct gpio_chip *gc, struct device *dev,
609 gc->bgpio_bits = sz * 8;
610 if (gc->bgpio_bits > BITS_PER_LONG)
613 spin_lock_init(&gc->bgpio_lock);
614 gc->parent = dev;
615 gc->label = dev_name(dev);
616 gc->base = -1;
617 gc->ngpio = gc->bgpio_bits;
618 gc->request = bgpio_request;
619 gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN);
621 ret = bgpio_setup_io(gc, dat, set, clr, flags);
625 ret = bgpio_setup_accessors(dev, gc, flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
629 ret = bgpio_setup_direction(gc, dirout, dirin, flags);
633 gc->bgpio_data = gc->read_reg(gc->reg_dat);
634 if (gc->set == bgpio_set_set &&
636 gc->bgpio_data = gc->read_reg(gc->reg_set);
639 gc->bgpio_dir_unreadable = true;
644 if ((gc->reg_dir_out || gc->reg_dir_in) &&
646 if (gc->reg_dir_out)
647 gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
648 else if (gc->reg_dir_in)
649 gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
656 if (gc->reg_dir_out && gc->reg_dir_in)
657 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
736 struct gpio_chip *gc;
774 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
775 if (!gc)
778 err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags);
784 gc->label = pdata->label;
785 gc->base = pdata->base;
787 gc->ngpio = pdata->ngpio;
790 platform_set_drvdata(pdev, gc);
792 return devm_gpiochip_add_data(&pdev->dev, gc, NULL);