Lines Matching defs:bits
37 * ` 8, 16, 32 and 64 bits registers are supported, and``.
144 * This assumes that the bits in the GPIO register are in native endianness.
148 unsigned long *bits)
153 /* Make sure we first clear any bits that are zero when we read the register */
154 *bits &= ~*mask;
160 *bits |= gc->read_reg(gc->reg_set) & set_mask;
162 *bits |= gc->read_reg(gc->reg_dat) & get_mask;
173 * This only works if the bits in the GPIO register are in native endianness.
176 unsigned long *bits)
178 /* Make sure we first clear any bits that are zero when we read the register */
179 *bits &= ~*mask;
180 *bits |= gc->read_reg(gc->reg_dat) & *mask;
188 unsigned long *bits)
194 /* Make sure we first clear any bits that are zero when we read the register */
195 *bits &= ~*mask;
205 * Mirror the result into the "bits" result, this will give line 0
209 *bits |= bgpio_line2mask(gc, bit);
264 unsigned long *mask, unsigned long *bits,
274 if (test_bit(i, bits))
283 unsigned long *bits,
291 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
302 unsigned long *bits)
304 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
308 unsigned long *bits)
310 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
315 unsigned long *bits)
319 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
459 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);