Lines Matching refs:kona_gpio
80 struct bcm_kona_gpio *kona_gpio;
90 static void bcm_kona_gpio_lock_gpio(struct bcm_kona_gpio *kona_gpio,
97 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
99 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id));
101 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val);
103 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
106 static void bcm_kona_gpio_unlock_gpio(struct bcm_kona_gpio *kona_gpio,
113 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
115 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id));
117 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val);
119 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
124 struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip);
125 void __iomem *reg_base = kona_gpio->reg_base;
134 struct bcm_kona_gpio *kona_gpio;
141 kona_gpio = gpiochip_get_data(chip);
142 reg_base = kona_gpio->reg_base;
143 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
156 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
161 struct bcm_kona_gpio *kona_gpio;
168 kona_gpio = gpiochip_get_data(chip);
169 reg_base = kona_gpio->reg_base;
170 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
180 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
188 struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip);
190 bcm_kona_gpio_unlock_gpio(kona_gpio, gpio);
196 struct bcm_kona_gpio *kona_gpio = gpiochip_get_data(chip);
198 bcm_kona_gpio_lock_gpio(kona_gpio, gpio);
203 struct bcm_kona_gpio *kona_gpio;
208 kona_gpio = gpiochip_get_data(chip);
209 reg_base = kona_gpio->reg_base;
210 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
217 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
225 struct bcm_kona_gpio *kona_gpio;
232 kona_gpio = gpiochip_get_data(chip);
233 reg_base = kona_gpio->reg_base;
234 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
246 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
253 struct bcm_kona_gpio *kona_gpio;
255 kona_gpio = gpiochip_get_data(chip);
256 if (gpio >= kona_gpio->gpio_chip.ngpio)
258 return irq_create_mapping(kona_gpio->irq_domain, gpio);
264 struct bcm_kona_gpio *kona_gpio;
269 kona_gpio = gpiochip_get_data(chip);
270 reg_base = kona_gpio->reg_base;
290 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
305 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
339 struct bcm_kona_gpio *kona_gpio;
347 kona_gpio = irq_data_get_irq_chip_data(d);
348 reg_base = kona_gpio->reg_base;
349 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
355 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
360 struct bcm_kona_gpio *kona_gpio;
368 kona_gpio = irq_data_get_irq_chip_data(d);
369 reg_base = kona_gpio->reg_base;
370 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
375 gpiochip_disable_irq(&kona_gpio->gpio_chip, gpio);
377 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
382 struct bcm_kona_gpio *kona_gpio;
390 kona_gpio = irq_data_get_irq_chip_data(d);
391 reg_base = kona_gpio->reg_base;
392 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
397 gpiochip_enable_irq(&kona_gpio->gpio_chip, gpio);
399 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
404 struct bcm_kona_gpio *kona_gpio;
411 kona_gpio = irq_data_get_irq_chip_data(d);
412 reg_base = kona_gpio->reg_base;
430 dev_err(kona_gpio->gpio_chip.parent,
435 raw_spin_lock_irqsave(&kona_gpio->lock, flags);
442 raw_spin_unlock_irqrestore(&kona_gpio->lock, flags);
458 * For bank interrupts, we can't use chip_data to store the kona_gpio
462 reg_base = bank->kona_gpio->reg_base;
470 irq_find_mapping(bank->kona_gpio->irq_domain,
488 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d);
490 return gpiochip_reqres_irq(&kona_gpio->gpio_chip, d->hwirq);
495 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d);
497 gpiochip_relres_irq(&kona_gpio->gpio_chip, d->hwirq);
549 static void bcm_kona_gpio_reset(struct bcm_kona_gpio *kona_gpio)
554 reg_base = kona_gpio->reg_base;
556 for (i = 0; i < kona_gpio->num_bank; i++) {
571 struct bcm_kona_gpio *kona_gpio;
582 kona_gpio = devm_kzalloc(dev, sizeof(*kona_gpio), GFP_KERNEL);
583 if (!kona_gpio)
586 kona_gpio->gpio_chip = template_chip;
587 chip = &kona_gpio->gpio_chip;
595 kona_gpio->num_bank = ret;
597 if (kona_gpio->num_bank > GPIO_MAX_BANK_NUM) {
602 kona_gpio->banks = devm_kcalloc(dev,
603 kona_gpio->num_bank,
604 sizeof(*kona_gpio->banks),
606 if (!kona_gpio->banks)
609 kona_gpio->pdev = pdev;
610 platform_set_drvdata(pdev, kona_gpio);
612 chip->ngpio = kona_gpio->num_bank * GPIO_PER_BANK;
614 kona_gpio->irq_domain = irq_domain_add_linear(dev->of_node,
617 kona_gpio);
618 if (!kona_gpio->irq_domain) {
623 kona_gpio->reg_base = devm_platform_ioremap_resource(pdev, 0);
624 if (IS_ERR(kona_gpio->reg_base)) {
625 ret = PTR_ERR(kona_gpio->reg_base);
629 for (i = 0; i < kona_gpio->num_bank; i++) {
630 bank = &kona_gpio->banks[i];
633 bank->kona_gpio = kona_gpio;
643 bcm_kona_gpio_reset(kona_gpio);
645 ret = devm_gpiochip_add_data(dev, chip, kona_gpio);
650 for (i = 0; i < kona_gpio->num_bank; i++) {
651 bank = &kona_gpio->banks[i];
657 raw_spin_lock_init(&kona_gpio->lock);
662 irq_domain_remove(kona_gpio->irq_domain);