Lines Matching refs:reg
101 const enum aspeed_sgpio_reg reg)
103 switch (reg) {
181 enum aspeed_sgpio_reg reg;
186 reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
187 rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
199 u32 reg = 0;
209 reg = ioread32(addr_r);
212 reg |= GPIO_BIT(offset);
214 reg &= ~GPIO_BIT(offset);
216 iowrite32(reg, addr_w);
300 u32 reg, bit;
309 reg = ioread32(addr);
311 reg |= bit;
313 reg &= ~bit;
315 iowrite32(reg, addr);
335 u32 bit, reg;
369 reg = ioread32(addr);
370 reg = (reg & ~bit) | type0;
371 iowrite32(reg, addr);
374 reg = ioread32(addr);
375 reg = (reg & ~bit) | type1;
376 iowrite32(reg, addr);
379 reg = ioread32(addr);
380 reg = (reg & ~bit) | type2;
381 iowrite32(reg, addr);
396 unsigned long reg;
403 reg = ioread32(bank_reg(data, bank, reg_irq_status));
405 for_each_set_bit(p, ®, 32) {