Lines Matching refs:adnp
20 struct adnp {
36 static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value)
40 err = i2c_smbus_read_byte_data(adnp->client, offset);
42 dev_err(adnp->gpio.parent, "%s failed: %d\n",
51 static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value)
55 err = i2c_smbus_write_byte_data(adnp->client, offset, value);
57 dev_err(adnp->gpio.parent, "%s failed: %d\n",
67 struct adnp *adnp = gpiochip_get_data(chip);
68 unsigned int reg = offset >> adnp->reg_shift;
73 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &value);
80 static void __adnp_gpio_set(struct adnp *adnp, unsigned offset, int value)
82 unsigned int reg = offset >> adnp->reg_shift;
87 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &val);
96 adnp_write(adnp, GPIO_PLR(adnp) + reg, val);
101 struct adnp *adnp = gpiochip_get_data(chip);
103 mutex_lock(&adnp->i2c_lock);
104 __adnp_gpio_set(adnp, offset, value);
105 mutex_unlock(&adnp->i2c_lock);
110 struct adnp *adnp = gpiochip_get_data(chip);
111 unsigned int reg = offset >> adnp->reg_shift;
116 mutex_lock(&adnp->i2c_lock);
118 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
124 err = adnp_write(adnp, GPIO_DDR(adnp) + reg, value);
128 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
140 mutex_unlock(&adnp->i2c_lock);
147 struct adnp *adnp = gpiochip_get_data(chip);
148 unsigned int reg = offset >> adnp->reg_shift;
153 mutex_lock(&adnp->i2c_lock);
155 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
161 err = adnp_write(adnp, GPIO_DDR(adnp) + reg, val);
165 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
174 __adnp_gpio_set(adnp, offset, value);
178 mutex_unlock(&adnp->i2c_lock);
184 struct adnp *adnp = gpiochip_get_data(chip);
185 unsigned int num_regs = 1 << adnp->reg_shift, i, j;
191 mutex_lock(&adnp->i2c_lock);
193 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr);
197 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &plr);
201 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
205 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
209 mutex_unlock(&adnp->i2c_lock);
212 unsigned int bit = (i << adnp->reg_shift) + j;
238 mutex_unlock(&adnp->i2c_lock);
243 struct adnp *adnp = data;
246 num_regs = 1 << adnp->reg_shift;
249 unsigned int base = i << adnp->reg_shift, bit;
254 mutex_lock(&adnp->i2c_lock);
256 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &level);
258 mutex_unlock(&adnp->i2c_lock);
262 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
264 mutex_unlock(&adnp->i2c_lock);
268 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
270 mutex_unlock(&adnp->i2c_lock);
274 mutex_unlock(&adnp->i2c_lock);
277 changed = level ^ adnp->irq_level[i];
280 pending = changed & ((adnp->irq_fall[i] & ~level) |
281 (adnp->irq_rise[i] & level));
284 pending |= (adnp->irq_high[i] & level) |
285 (adnp->irq_low[i] & ~level);
292 child_irq = irq_find_mapping(adnp->gpio.irq.domain,
304 struct adnp *adnp = gpiochip_get_data(gc);
305 unsigned int reg = d->hwirq >> adnp->reg_shift;
308 adnp->irq_enable[reg] &= ~BIT(pos);
314 struct adnp *adnp = gpiochip_get_data(gc);
315 unsigned int reg = d->hwirq >> adnp->reg_shift;
318 adnp->irq_enable[reg] |= BIT(pos);
324 struct adnp *adnp = gpiochip_get_data(gc);
325 unsigned int reg = d->hwirq >> adnp->reg_shift;
329 adnp->irq_rise[reg] |= BIT(pos);
331 adnp->irq_rise[reg] &= ~BIT(pos);
334 adnp->irq_fall[reg] |= BIT(pos);
336 adnp->irq_fall[reg] &= ~BIT(pos);
339 adnp->irq_high[reg] |= BIT(pos);
341 adnp->irq_high[reg] &= ~BIT(pos);
344 adnp->irq_low[reg] |= BIT(pos);
346 adnp->irq_low[reg] &= ~BIT(pos);
354 struct adnp *adnp = gpiochip_get_data(gc);
356 mutex_lock(&adnp->irq_lock);
362 struct adnp *adnp = gpiochip_get_data(gc);
363 unsigned int num_regs = 1 << adnp->reg_shift, i;
365 mutex_lock(&adnp->i2c_lock);
368 adnp_write(adnp, GPIO_IER(adnp) + i, adnp->irq_enable[i]);
370 mutex_unlock(&adnp->i2c_lock);
371 mutex_unlock(&adnp->irq_lock);
375 .name = "gpio-adnp",
383 static int adnp_irq_setup(struct adnp *adnp)
385 unsigned int num_regs = 1 << adnp->reg_shift, i;
386 struct gpio_chip *chip = &adnp->gpio;
389 mutex_init(&adnp->irq_lock);
399 adnp->irq_enable = devm_kcalloc(chip->parent, num_regs, 6,
401 if (!adnp->irq_enable)
404 adnp->irq_level = adnp->irq_enable + (num_regs * 1);
405 adnp->irq_rise = adnp->irq_enable + (num_regs * 2);
406 adnp->irq_fall = adnp->irq_enable + (num_regs * 3);
407 adnp->irq_high = adnp->irq_enable + (num_regs * 4);
408 adnp->irq_low = adnp->irq_enable + (num_regs * 5);
415 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &adnp->irq_level[i]);
420 err = adnp_write(adnp, GPIO_IER(adnp) + i, 0);
424 adnp->irq_enable[i] = 0x00;
427 err = devm_request_threaded_irq(chip->parent, adnp->client->irq,
430 dev_name(chip->parent), adnp);
433 adnp->client->irq, err);
440 static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios,
443 struct gpio_chip *chip = &adnp->gpio;
446 adnp->reg_shift = get_count_order(num_gpios) - 3;
459 chip->label = adnp->client->name;
460 chip->parent = &adnp->client->dev;
467 err = adnp_irq_setup(adnp);
482 err = devm_gpiochip_add_data(&adnp->client->dev, chip, adnp);
493 struct adnp *adnp;
505 adnp = devm_kzalloc(&client->dev, sizeof(*adnp), GFP_KERNEL);
506 if (!adnp)
509 mutex_init(&adnp->i2c_lock);
510 adnp->client = client;
512 err = adnp_gpio_setup(adnp, num_gpios,
517 i2c_set_clientdata(client, adnp);
523 { "gpio-adnp" },
529 { .compatible = "ad,gpio-adnp", },
536 .name = "gpio-adnp",