Lines Matching refs:dio48egpio
58 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
62 if (dio48egpio->io_state[port] & mask)
70 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
73 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
77 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
83 dio48egpio->io_state[io_port] |= 0xF0;
84 dio48egpio->control[control_port] |= BIT(3);
86 dio48egpio->io_state[io_port] |= 0x0F;
87 dio48egpio->control[control_port] |= BIT(0);
90 dio48egpio->io_state[io_port] |= 0xFF;
92 dio48egpio->control[control_port] |= BIT(4);
94 dio48egpio->control[control_port] |= BIT(1);
97 control = BIT(7) | dio48egpio->control[control_port];
102 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
110 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
114 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
119 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
125 dio48egpio->io_state[io_port] &= 0x0F;
126 dio48egpio->control[control_port] &= ~BIT(3);
128 dio48egpio->io_state[io_port] &= 0xF0;
129 dio48egpio->control[control_port] &= ~BIT(0);
132 dio48egpio->io_state[io_port] &= 0x00;
134 dio48egpio->control[control_port] &= ~BIT(4);
136 dio48egpio->control[control_port] &= ~BIT(1);
140 dio48egpio->out_state[io_port] |= mask;
142 dio48egpio->out_state[io_port] &= ~mask;
144 control = BIT(7) | dio48egpio->control[control_port];
147 outb(dio48egpio->out_state[io_port], dio48egpio->base + out_port);
152 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
159 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
166 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
169 if (!(dio48egpio->io_state[port] & mask)) {
170 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
174 port_state = inb(dio48egpio->base + in_port);
176 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
186 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
196 port_addr = dio48egpio->base + ports[offset / 8];
207 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
213 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
216 dio48egpio->out_state[port] |= mask;
218 dio48egpio->out_state[port] &= ~mask;
220 outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
222 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
228 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
238 port_addr = dio48egpio->base + ports[index];
242 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
245 dio48egpio->out_state[index] &= ~gpio_mask;
246 dio48egpio->out_state[index] |= bitmask;
247 outb(dio48egpio->out_state[index], port_addr);
249 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
260 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
268 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
271 dio48egpio->irq_mask &= ~BIT(0);
273 dio48egpio->irq_mask &= ~BIT(1);
275 if (!dio48egpio->irq_mask)
277 inb(dio48egpio->base + 0xB);
279 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
285 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
293 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
295 if (!dio48egpio->irq_mask) {
297 outb(0x00, dio48egpio->base + 0xF);
298 outb(0x00, dio48egpio->base + 0xB);
302 dio48egpio->irq_mask |= BIT(0);
304 dio48egpio->irq_mask |= BIT(1);
306 raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
333 struct dio48e_gpio *const dio48egpio = dev_id;
334 struct gpio_chip *const chip = &dio48egpio->chip;
335 const unsigned long irq_mask = dio48egpio->irq_mask;
342 raw_spin_lock(&dio48egpio->lock);
344 outb(0x00, dio48egpio->base + 0xF);
346 raw_spin_unlock(&dio48egpio->lock);
373 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(gc);
376 inb(dio48egpio->base + 0xB);
383 struct dio48e_gpio *dio48egpio;
388 dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
389 if (!dio48egpio)
398 dio48egpio->chip.label = name;
399 dio48egpio->chip.parent = dev;
400 dio48egpio->chip.owner = THIS_MODULE;
401 dio48egpio->chip.base = -1;
402 dio48egpio->chip.ngpio = DIO48E_NGPIO;
403 dio48egpio->chip.names = dio48e_names;
404 dio48egpio->chip.get_direction = dio48e_gpio_get_direction;
405 dio48egpio->chip.direction_input = dio48e_gpio_direction_input;
406 dio48egpio->chip.direction_output = dio48e_gpio_direction_output;
407 dio48egpio->chip.get = dio48e_gpio_get;
408 dio48egpio->chip.get_multiple = dio48e_gpio_get_multiple;
409 dio48egpio->chip.set = dio48e_gpio_set;
410 dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple;
411 dio48egpio->base = base[id];
413 girq = &dio48egpio->chip.irq;
423 raw_spin_lock_init(&dio48egpio->lock);
437 err = devm_gpiochip_add_data(dev, &dio48egpio->chip, dio48egpio);
444 dio48egpio);