Lines Matching defs:aspeed
97 static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr,
100 void __iomem *base = aspeed->base;
130 static int opb_writeb(struct fsi_master_aspeed *aspeed, u32 addr, u8 val)
132 return __opb_write(aspeed, addr, val, XFER_BYTE);
135 static int opb_writew(struct fsi_master_aspeed *aspeed, u32 addr, __be16 val)
137 return __opb_write(aspeed, addr, (__force u16)val, XFER_HALFWORD);
140 static int opb_writel(struct fsi_master_aspeed *aspeed, u32 addr, __be32 val)
142 return __opb_write(aspeed, addr, (__force u32)val, XFER_FULLWORD);
145 static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr,
148 void __iomem *base = aspeed->base;
198 static int opb_readl(struct fsi_master_aspeed *aspeed, uint32_t addr, __be32 *out)
200 return __opb_read(aspeed, addr, XFER_FULLWORD, out);
203 static int opb_readw(struct fsi_master_aspeed *aspeed, uint32_t addr, __be16 *out)
205 return __opb_read(aspeed, addr, XFER_HALFWORD, (void *)out);
208 static int opb_readb(struct fsi_master_aspeed *aspeed, uint32_t addr, u8 *out)
210 return __opb_read(aspeed, addr, XFER_BYTE, (void *)out);
213 static int check_errors(struct fsi_master_aspeed *aspeed, int err)
220 opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0);
221 opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0);
222 opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0);
234 ret = opb_writel(aspeed, ctrl_base + FSI_MRESP0,
250 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
259 mutex_lock(&aspeed->lock);
263 ret = opb_readb(aspeed, fsi_base + addr, val);
266 ret = opb_readw(aspeed, fsi_base + addr, val);
269 ret = opb_readl(aspeed, fsi_base + addr, val);
276 ret = check_errors(aspeed, ret);
278 mutex_unlock(&aspeed->lock);
285 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
294 mutex_lock(&aspeed->lock);
298 ret = opb_writeb(aspeed, fsi_base + addr, *(u8 *)val);
301 ret = opb_writew(aspeed, fsi_base + addr, *(__be16 *)val);
304 ret = opb_writel(aspeed, fsi_base + addr, *(__be32 *)val);
311 ret = check_errors(aspeed, ret);
313 mutex_unlock(&aspeed->lock);
320 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
329 mutex_lock(&aspeed->lock);
332 ret = opb_writel(aspeed, ctrl_base + FSI_MCENP0 + (4 * idx), reg);
336 ret = opb_writel(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), reg);
342 mutex_unlock(&aspeed->lock);
370 struct fsi_master_aspeed *aspeed =
373 kfree(aspeed);
387 static int aspeed_master_init(struct fsi_master_aspeed *aspeed)
393 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
398 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
401 opb_writel(aspeed, ctrl_base + FSI_MECTRL, reg);
407 dev_info(aspeed->dev, "mmode set to %08x (divisor %d)\n",
409 opb_writel(aspeed, ctrl_base + FSI_MMODE, reg);
412 opb_writel(aspeed, ctrl_base + FSI_MDLYR, reg);
415 opb_writel(aspeed, ctrl_base + FSI_MSENP0, reg);
420 opb_writel(aspeed, ctrl_base + FSI_MCENP0, reg);
422 opb_readl(aspeed, ctrl_base + FSI_MAEB, NULL);
425 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
427 opb_readl(aspeed, ctrl_base + FSI_MLEVP0, NULL);
431 opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg);
434 opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg);
442 struct fsi_master_aspeed *aspeed = dev_get_drvdata(dev);
444 mutex_lock(&aspeed->lock);
445 gpiod_set_value(aspeed->cfam_reset_gpio, 1);
447 gpiod_set_value(aspeed->cfam_reset_gpio, 0);
449 opb_writel(aspeed, ctrl_base + FSI_MRESP0, cpu_to_be32(FSI_MRESP_RST_ALL_MASTER));
450 mutex_unlock(&aspeed->lock);
457 static int setup_cfam_reset(struct fsi_master_aspeed *aspeed)
459 struct device *dev = aspeed->dev;
469 aspeed->cfam_reset_gpio = gpio;
529 struct fsi_master_aspeed *aspeed;
539 aspeed = kzalloc(sizeof(*aspeed), GFP_KERNEL);
540 if (!aspeed)
543 aspeed->dev = &pdev->dev;
545 aspeed->base = devm_platform_ioremap_resource(pdev, 0);
546 if (IS_ERR(aspeed->base)) {
547 rc = PTR_ERR(aspeed->base);
551 aspeed->clk = devm_clk_get(aspeed->dev, NULL);
552 if (IS_ERR(aspeed->clk)) {
553 dev_err(aspeed->dev, "couldn't get clock\n");
554 rc = PTR_ERR(aspeed->clk);
557 rc = clk_prepare_enable(aspeed->clk);
559 dev_err(aspeed->dev, "couldn't enable clock\n");
563 rc = setup_cfam_reset(aspeed);
568 writel(0x1, aspeed->base + OPB_CLK_SYNC);
570 aspeed->base + OPB_IRQ_MASK);
573 writel(0x10, aspeed->base + OPB_RETRY_COUNTER);
575 writel(ctrl_base, aspeed->base + OPB_CTRL_BASE);
576 writel(fsi_base, aspeed->base + OPB_FSI_BASE);
579 writel(0x00030b1b, aspeed->base + OPB0_READ_ORDER1);
582 writel(0x0011101b, aspeed->base + OPB0_WRITE_ORDER1);
583 writel(0x0c330f3f, aspeed->base + OPB0_WRITE_ORDER2);
590 writel(0x1, aspeed->base + OPB0_SELECT);
592 rc = opb_readl(aspeed, ctrl_base + FSI_MVER, &raw);
602 aspeed->master.dev.parent = &pdev->dev;
603 aspeed->master.dev.release = aspeed_master_release;
604 aspeed->master.dev.of_node = of_node_get(dev_of_node(&pdev->dev));
606 aspeed->master.n_links = links;
607 aspeed->master.read = aspeed_master_read;
608 aspeed->master.write = aspeed_master_write;
609 aspeed->master.send_break = aspeed_master_break;
610 aspeed->master.term = aspeed_master_term;
611 aspeed->master.link_enable = aspeed_master_link_enable;
613 dev_set_drvdata(&pdev->dev, aspeed);
615 mutex_init(&aspeed->lock);
616 aspeed_master_init(aspeed);
618 rc = fsi_master_register(&aspeed->master);
629 get_device(&aspeed->master.dev);
633 clk_disable_unprepare(aspeed->clk);
635 kfree(aspeed);
641 struct fsi_master_aspeed *aspeed = platform_get_drvdata(pdev);
643 fsi_master_unregister(&aspeed->master);
644 clk_disable_unprepare(aspeed->clk);
650 { .compatible = "aspeed,ast2600-fsi-master" },
657 .name = "fsi-master-aspeed",