Lines Matching defs:baseaddr
310 * @baseaddr: Base address of the DDR controller.
324 void __iomem *baseaddr;
368 base = priv->baseaddr;
423 base = priv->baseaddr;
542 regval = readl(priv->baseaddr + DDR_QOS_IRQ_STAT_OFST);
557 writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST);
792 dimm->mtype = p_data->get_mtype(priv->baseaddr);
795 dimm->dtype = p_data->get_dtype(priv->baseaddr);
844 priv->baseaddr + DDR_QOS_IRQ_EN_OFST);
851 priv->baseaddr + DDR_QOS_IRQ_DB_OFST);
970 writel(regval, priv->baseaddr + ECC_POISON0_OFST);
975 writel(regval, priv->baseaddr + ECC_POISON1_OFST);
987 readl(priv->baseaddr + ECC_POISON0_OFST),
988 readl(priv->baseaddr + ECC_POISON1_OFST),
1015 (((readl(priv->baseaddr + ECC_CFG1_OFST)) & 0x3) == 0x3)
1026 writel(0, priv->baseaddr + DDRC_SWCTL);
1028 writel(ECC_CEPOISON_MASK, priv->baseaddr + ECC_CFG1_OFST);
1030 writel(ECC_UEPOISON_MASK, priv->baseaddr + ECC_CFG1_OFST);
1031 writel(1, priv->baseaddr + DDRC_SWCTL);
1122 memtype = readl(priv->baseaddr + CTRL_OFST);
1269 addrmap[index] = readl(priv->baseaddr + addrmap_offset);
1299 void __iomem *baseaddr;
1304 baseaddr = devm_ioremap_resource(&pdev->dev, res);
1305 if (IS_ERR(baseaddr))
1306 return PTR_ERR(baseaddr);
1312 if (!p_data->get_ecc_state(baseaddr)) {
1333 priv->baseaddr = baseaddr;
1369 writel(0x0, baseaddr + ECC_CTRL_OFST);