Lines Matching defs:channels
286 #define NUM_CHANNELS 6 /* Max channels per MC */
289 #define KNL_MAX_CHANNELS 6 /* KNL max num. of PCI channels */
508 * - 3 DDR3 channels, 2 DPC per channel
511 * - 4 DDR4 channels, 3 DPC per channel
514 * - 4 DDR4 channels, 3 DPC per channel
519 * - each scalable memory buffer supports 4 DDR3/DDR4 channels, 3 DPC
578 * KNL's memory channels are swizzled between memory controllers.
625 * - 2 DDR3 channels, 2 DPC per channel
628 * - 4 DDR4 channels, 3 DPC per channel
631 * - 4 DDR4 channels, 3 DPC per channel
636 * - each scalable memory buffer supports 4 DDR3/DDR4 channels, 3 DPC
1236 * physical DRAM channels modules.)
1337 * @mc_sizes: Output sizes of channels (must have space for KNL_MAX_CHANNELS
1524 /* Figure out which channels participate in interleave. */
1585 int channels = pvt->info.type == KNIGHTS_LANDING ? KNL_MAX_CHANNELS
1605 for (i = 0; i < channels; i++) {
2875 * MC0 channels 0-2 are device 9 function 2-4,
2876 * MC1 channels 3-5 are device 8 function 2-4.