Lines Matching refs:mcopt1
821 * @mcopt1: The 32-bit Memory Controller Option 1 register value
836 static enum dev_type ppc4xx_edac_get_dtype(u32 mcopt1)
838 switch (mcopt1 & SDRAM_MCOPT1_WDTH_MASK) {
850 * @mcopt1: The 32-bit Memory Controller Option 1 register value
859 static enum mem_type ppc4xx_edac_get_mtype(u32 mcopt1)
861 bool rden = ((mcopt1 & SDRAM_MCOPT1_RDEN_MASK) == SDRAM_MCOPT1_RDEN);
863 switch (mcopt1 & SDRAM_MCOPT1_DDR_TYPE_MASK) {
878 * @mcopt1: The 32-bit Memory Controller Option 1 register value
889 static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)
901 mtype = ppc4xx_edac_get_mtype(mcopt1);
902 dtype = ppc4xx_edac_get_dtype(mcopt1);
996 * @mcopt1: The 32-bit Memory Controller Option 1 register value
1008 const dcr_host_t *dcr_host, u32 mcopt1)
1011 const u32 memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
1071 status = ppc4xx_edac_init_csrows(mci, mcopt1);
1225 u32 mcopt1, memcheck;
1260 mcopt1 = mfsdram(&dcr_host, SDRAM_MCOPT1);
1261 memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
1291 status = ppc4xx_edac_mc_init(mci, op, &dcr_host, mcopt1);