Lines Matching refs:addr
269 u64 addr;
282 addr = get_mem_ctrl_hub_base_addr();
283 if (!addr)
288 addr = get_sideband_reg_base_addr();
289 if (!addr)
291 addr += (port << 16);
295 base = ioremap((resource_size_t)addr, size);
367 static bool in_region(struct region *rp, u64 addr)
372 return rp->base <= addr && addr <= rp->limit;
616 static void remove_addr_bit(u64 *addr, int bitidx)
624 *addr = ((*addr >> 1) & ~mask) | (*addr & mask);
627 /* XOR all the bits from addr specified in mask */
628 static int hash_by_mask(u64 addr, u64 mask)
630 u64 result = addr & mask;
646 static int sys2pmi(const u64 addr, u32 *pmiidx, u64 *pmiaddr, char *msg)
654 bool mot_hit = in_region(&mot, addr);
667 if (addr >= (1ul << PND_MAX_PHYS_BIT) ||
668 (addr >= top_lm && addr < _4GB) || addr >= top_hm) {
669 snprintf(msg, PND2_MSG_SIZE, "Error address 0x%llx is not DRAM", addr);
674 contig_addr = remove_mmio_gap(addr);
676 if (in_region(&as0, addr)) {
684 } else if (in_region(&as1, addr)) {
692 } else if (in_region(&as2, addr) && (asym_2way.asym_2way_intlv_mode == 0x3ul)) {
697 channel1 = mot_hit ? ((bool)((addr >> mot_intlv_bit) & 1)) :
715 slice1 = (addr >> MOT_SLC_INTLV_BIT) & 1;
718 slice1 = hash_by_mask(addr, slice_hash_mask);
732 channel1 = (addr >> mot_intlv_bit) & 1;
1117 static int get_memory_error_data(struct mem_ctl_info *mci, u64 addr,
1124 ret = sys2pmi(addr, &pmiidx, &pmiaddr, msg);
1138 addr, pmiaddr, daddr->chan, daddr->dimm, daddr->rank, daddr->bank, daddr->row, daddr->col);
1186 optype = "addr/cmd error";
1201 rc = get_memory_error_data(mci, m->addr, daddr, msg);
1213 edac_mc_handle_error(tp_event, mci, core_err_cnt, m->addr >> PAGE_SHIFT,
1214 m->addr & ~PAGE_MASK, 0, daddr->chan, daddr->dimm, -1, optype, msg);
1421 pnd2_mc_printk(mci, KERN_INFO, "ADDR %llx ", mce->addr);
1461 m.addr = val;
1465 m.addr, daddr.chan, daddr.dimm, daddr.rank, daddr.bank, daddr.row, daddr.col);