Lines Matching defs:i82975x_printk
21 #define i82975x_printk(level, fmt, arg...) \
446 i82975x_printk(KERN_INFO, "DRAM Timings : Ch0 Ch1\n"
495 i82975x_printk(KERN_INFO, "MCHBAR real = %0x, remapped = %p\n",
506 i82975x_printk(KERN_INFO, "DRBCH0R0 = 0x%02x\n", c0drb[0]);
507 i82975x_printk(KERN_INFO, "DRBCH0R1 = 0x%02x\n", c0drb[1]);
508 i82975x_printk(KERN_INFO, "DRBCH0R2 = 0x%02x\n", c0drb[2]);
509 i82975x_printk(KERN_INFO, "DRBCH0R3 = 0x%02x\n", c0drb[3]);
510 i82975x_printk(KERN_INFO, "DRBCH1R0 = 0x%02x\n", c1drb[0]);
511 i82975x_printk(KERN_INFO, "DRBCH1R1 = 0x%02x\n", c1drb[1]);
512 i82975x_printk(KERN_INFO, "DRBCH1R2 = 0x%02x\n", c1drb[2]);
513 i82975x_printk(KERN_INFO, "DRBCH1R3 = 0x%02x\n", c1drb[3]);
519 i82975x_printk(KERN_INFO, "DRC_CH0 = %0x, %s\n", drc[0],
522 i82975x_printk(KERN_INFO, "DRC_CH1 = %0x, %s\n", drc[1],
526 i82975x_printk(KERN_INFO, "C0 BNKARC = %0x\n",
528 i82975x_printk(KERN_INFO, "C1 BNKARC = %0x\n",
534 i82975x_printk(KERN_INFO, "ECC disabled on both channels.\n");