Lines Matching refs:DIMMS_PER_CHANNEL
53 #define DIMMS_PER_CHANNEL 4
340 u16 b0_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */
344 u16 b1_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */
349 struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS];
827 * the information is contained in DIMMS_PER_CHANNEL different
828 * registers determining which of the DIMMS_PER_CHANNEL requires
871 if (n >= DIMMS_PER_CHANNEL) {
1095 for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) {
1120 for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
1137 for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
1281 layers[2].size = DIMMS_PER_CHANNEL;
1294 pvt->maxdimmperch = DIMMS_PER_CHANNEL;