Lines Matching refs:chan
143 #define ZYNQMP_DMA_DESC_SIZE(chan) (chan->desc_size)
145 #define to_chan(chan) container_of(chan, struct zynqmp_dma_chan, \
246 * @chan: Driver specific DMA channel
253 struct zynqmp_dma_chan *chan;
258 static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg,
261 lo_hi_writeq(value, chan->regs + reg);
266 * @chan: ZynqMP DMA DMA channel pointer
269 static void zynqmp_dma_update_desc_to_ctrlr(struct zynqmp_dma_chan *chan,
275 zynqmp_dma_writeq(chan, ZYNQMP_DMA_SRC_START_LSB, addr);
277 zynqmp_dma_writeq(chan, ZYNQMP_DMA_DST_START_LSB, addr);
282 * @chan: ZynqMP DMA channel pointer
285 static void zynqmp_dma_desc_config_eod(struct zynqmp_dma_chan *chan,
297 * @chan: ZynqMP DMA channel pointer
304 static void zynqmp_dma_config_sg_ll_desc(struct zynqmp_dma_chan *chan,
316 if (chan->is_dmacoherent) {
322 dma_addr_t addr = chan->desc_pool_p +
323 ((uintptr_t)sdesc - (uintptr_t)chan->desc_pool_v);
326 ddesc->nxtdscraddr = addr + ZYNQMP_DMA_DESC_SIZE(chan);
332 * @chan: ZynqMP DMA channel pointer
334 static void zynqmp_dma_init(struct zynqmp_dma_chan *chan)
338 writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
339 val = readl(chan->regs + ZYNQMP_DMA_ISR);
340 writel(val, chan->regs + ZYNQMP_DMA_ISR);
342 if (chan->is_dmacoherent) {
346 writel(val, chan->regs + ZYNQMP_DMA_DSCR_ATTR);
349 val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
350 if (chan->is_dmacoherent) {
356 writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
359 val = readl(chan->regs + ZYNQMP_DMA_IRQ_SRC_ACCT);
360 val = readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
362 chan->idle = true;
373 struct zynqmp_dma_chan *chan = to_chan(tx->chan);
379 spin_lock_irqsave(&chan->lock, irqflags);
382 if (!list_empty(&chan->pending_list)) {
383 desc = list_last_entry(&chan->pending_list,
394 list_add_tail(&new->node, &chan->pending_list);
395 spin_unlock_irqrestore(&chan->lock, irqflags);
402 * @chan: ZynqMP DMA channel pointer
407 zynqmp_dma_get_descriptor(struct zynqmp_dma_chan *chan)
412 spin_lock_irqsave(&chan->lock, irqflags);
413 desc = list_first_entry(&chan->free_list,
416 spin_unlock_irqrestore(&chan->lock, irqflags);
420 memset((void *)desc->src_v, 0, ZYNQMP_DMA_DESC_SIZE(chan));
421 memset((void *)desc->dst_v, 0, ZYNQMP_DMA_DESC_SIZE(chan));
428 * @chan: ZynqMP DMA channel pointer
431 static void zynqmp_dma_free_descriptor(struct zynqmp_dma_chan *chan,
436 chan->desc_free_cnt++;
438 list_add_tail(&sdesc->node, &chan->free_list);
440 chan->desc_free_cnt++;
441 list_move_tail(&child->node, &chan->free_list);
447 * @chan: ZynqMP DMA channel pointer
450 static void zynqmp_dma_free_desc_list(struct zynqmp_dma_chan *chan,
456 zynqmp_dma_free_descriptor(chan, desc);
467 struct zynqmp_dma_chan *chan = to_chan(dchan);
471 ret = pm_runtime_resume_and_get(chan->dev);
475 chan->sw_desc_pool = kcalloc(ZYNQMP_DMA_NUM_DESCS, sizeof(*desc),
477 if (!chan->sw_desc_pool)
480 chan->idle = true;
481 chan->desc_free_cnt = ZYNQMP_DMA_NUM_DESCS;
483 INIT_LIST_HEAD(&chan->free_list);
486 desc = chan->sw_desc_pool + i;
487 dma_async_tx_descriptor_init(&desc->async_tx, &chan->common);
489 list_add_tail(&desc->node, &chan->free_list);
492 chan->desc_pool_v = dma_alloc_coherent(chan->dev,
493 (2 * ZYNQMP_DMA_DESC_SIZE(chan) *
495 &chan->desc_pool_p, GFP_KERNEL);
496 if (!chan->desc_pool_v)
500 desc = chan->sw_desc_pool + i;
501 desc->src_v = (struct zynqmp_dma_desc_ll *) (chan->desc_pool_v +
502 (i * ZYNQMP_DMA_DESC_SIZE(chan) * 2));
504 desc->src_p = chan->desc_pool_p +
505 (i * ZYNQMP_DMA_DESC_SIZE(chan) * 2);
506 desc->dst_p = desc->src_p + ZYNQMP_DMA_DESC_SIZE(chan);
514 * @chan: ZynqMP DMA channel pointer
516 static void zynqmp_dma_start(struct zynqmp_dma_chan *chan)
518 writel(ZYNQMP_DMA_INT_EN_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IER);
519 writel(0, chan->regs + ZYNQMP_DMA_TOTAL_BYTE);
520 chan->idle = false;
521 writel(ZYNQMP_DMA_ENABLE, chan->regs + ZYNQMP_DMA_CTRL2);
526 * @chan: ZynqMP DMA channel pointer
529 static void zynqmp_dma_handle_ovfl_int(struct zynqmp_dma_chan *chan, u32 status)
532 writel(0, chan->regs + ZYNQMP_DMA_TOTAL_BYTE);
534 readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
536 readl(chan->regs + ZYNQMP_DMA_IRQ_SRC_ACCT);
539 static void zynqmp_dma_config(struct zynqmp_dma_chan *chan)
543 val = readl(chan->regs + ZYNQMP_DMA_CTRL0);
545 writel(val, chan->regs + ZYNQMP_DMA_CTRL0);
547 val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
548 burst_val = __ilog2_u32(chan->src_burst_len);
551 burst_val = __ilog2_u32(chan->dst_burst_len);
554 writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
567 struct zynqmp_dma_chan *chan = to_chan(dchan);
569 chan->src_burst_len = clamp(config->src_maxburst, 1U,
571 chan->dst_burst_len = clamp(config->dst_maxburst, 1U,
579 * @chan: ZynqMP DMA channel pointer
581 static void zynqmp_dma_start_transfer(struct zynqmp_dma_chan *chan)
585 if (!chan->idle)
588 zynqmp_dma_config(chan);
590 desc = list_first_entry_or_null(&chan->pending_list,
595 list_splice_tail_init(&chan->pending_list, &chan->active_list);
596 zynqmp_dma_update_desc_to_ctrlr(chan, desc);
597 zynqmp_dma_start(chan);
603 * @chan: ZynqMP DMA channel
605 static void zynqmp_dma_chan_desc_cleanup(struct zynqmp_dma_chan *chan)
609 list_for_each_entry_safe(desc, next, &chan->done_list, node) {
616 spin_unlock(&chan->lock);
618 spin_lock(&chan->lock);
622 zynqmp_dma_free_descriptor(chan, desc);
628 * @chan: ZynqMP DMA channel pointer
630 static void zynqmp_dma_complete_descriptor(struct zynqmp_dma_chan *chan)
634 desc = list_first_entry_or_null(&chan->active_list,
640 list_add_tail(&desc->node, &chan->done_list);
649 struct zynqmp_dma_chan *chan = to_chan(dchan);
652 spin_lock_irqsave(&chan->lock, irqflags);
653 zynqmp_dma_start_transfer(chan);
654 spin_unlock_irqrestore(&chan->lock, irqflags);
659 * @chan: ZynqMP DMA channel pointer
661 static void zynqmp_dma_free_descriptors(struct zynqmp_dma_chan *chan)
663 zynqmp_dma_free_desc_list(chan, &chan->active_list);
664 zynqmp_dma_free_desc_list(chan, &chan->pending_list);
665 zynqmp_dma_free_desc_list(chan, &chan->done_list);
674 struct zynqmp_dma_chan *chan = to_chan(dchan);
677 spin_lock_irqsave(&chan->lock, irqflags);
678 zynqmp_dma_free_descriptors(chan);
679 spin_unlock_irqrestore(&chan->lock, irqflags);
680 dma_free_coherent(chan->dev,
681 (2 * ZYNQMP_DMA_DESC_SIZE(chan) * ZYNQMP_DMA_NUM_DESCS),
682 chan->desc_pool_v, chan->desc_pool_p);
683 kfree(chan->sw_desc_pool);
684 pm_runtime_mark_last_busy(chan->dev);
685 pm_runtime_put_autosuspend(chan->dev);
690 * @chan: ZynqMP DMA channel pointer
692 static void zynqmp_dma_reset(struct zynqmp_dma_chan *chan)
694 writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
696 zynqmp_dma_complete_descriptor(chan);
697 zynqmp_dma_chan_desc_cleanup(chan);
698 zynqmp_dma_free_descriptors(chan);
699 zynqmp_dma_init(chan);
711 struct zynqmp_dma_chan *chan = (struct zynqmp_dma_chan *)data;
715 isr = readl(chan->regs + ZYNQMP_DMA_ISR);
716 imr = readl(chan->regs + ZYNQMP_DMA_IMR);
719 writel(isr, chan->regs + ZYNQMP_DMA_ISR);
721 tasklet_schedule(&chan->tasklet);
726 chan->idle = true;
729 chan->err = true;
730 tasklet_schedule(&chan->tasklet);
731 dev_err(chan->dev, "Channel %p has errors\n", chan);
736 zynqmp_dma_handle_ovfl_int(chan, status);
737 dev_dbg(chan->dev, "Channel %p overflow interrupt\n", chan);
750 struct zynqmp_dma_chan *chan = from_tasklet(chan, t, tasklet);
754 spin_lock_irqsave(&chan->lock, irqflags);
756 if (chan->err) {
757 zynqmp_dma_reset(chan);
758 chan->err = false;
762 count = readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
765 zynqmp_dma_complete_descriptor(chan);
766 zynqmp_dma_chan_desc_cleanup(chan);
770 if (chan->idle)
771 zynqmp_dma_start_transfer(chan);
774 spin_unlock_irqrestore(&chan->lock, irqflags);
785 struct zynqmp_dma_chan *chan = to_chan(dchan);
788 spin_lock_irqsave(&chan->lock, irqflags);
789 writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
790 zynqmp_dma_free_descriptors(chan);
791 spin_unlock_irqrestore(&chan->lock, irqflags);
810 struct zynqmp_dma_chan *chan;
817 chan = to_chan(dchan);
821 spin_lock_irqsave(&chan->lock, irqflags);
822 if (desc_cnt > chan->desc_free_cnt) {
823 spin_unlock_irqrestore(&chan->lock, irqflags);
824 dev_dbg(chan->dev, "chan %p descs are not available\n", chan);
827 chan->desc_free_cnt = chan->desc_free_cnt - desc_cnt;
828 spin_unlock_irqrestore(&chan->lock, irqflags);
832 new = zynqmp_dma_get_descriptor(chan);
836 zynqmp_dma_config_sg_ll_desc(chan, desc, dma_src,
848 zynqmp_dma_desc_config_eod(chan, desc);
856 * @chan: ZynqMP DMA channel pointer
858 static void zynqmp_dma_chan_remove(struct zynqmp_dma_chan *chan)
860 if (!chan)
863 if (chan->irq)
864 devm_free_irq(chan->zdev->dev, chan->irq, chan);
865 tasklet_kill(&chan->tasklet);
866 list_del(&chan->common.device_node);
879 struct zynqmp_dma_chan *chan;
884 chan = devm_kzalloc(zdev->dev, sizeof(*chan), GFP_KERNEL);
885 if (!chan)
887 chan->dev = zdev->dev;
888 chan->zdev = zdev;
891 chan->regs = devm_ioremap_resource(&pdev->dev, res);
892 if (IS_ERR(chan->regs))
893 return PTR_ERR(chan->regs);
895 chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
896 chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
897 chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
898 err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width);
904 if (chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_64 &&
905 chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_128) {
910 chan->is_dmacoherent = of_property_read_bool(node, "dma-coherent");
911 zdev->chan = chan;
912 tasklet_setup(&chan->tasklet, zynqmp_dma_do_tasklet);
913 spin_lock_init(&chan->lock);
914 INIT_LIST_HEAD(&chan->active_list);
915 INIT_LIST_HEAD(&chan->pending_list);
916 INIT_LIST_HEAD(&chan->done_list);
917 INIT_LIST_HEAD(&chan->free_list);
919 dma_cookie_init(&chan->common);
920 chan->common.device = &zdev->common;
921 list_add_tail(&chan->common.device_node, &zdev->common.channels);
923 zynqmp_dma_init(chan);
924 chan->irq = platform_get_irq(pdev, 0);
925 if (chan->irq < 0)
927 err = devm_request_irq(&pdev->dev, chan->irq, zynqmp_dma_irq_handler, 0,
928 "zynqmp-dma", chan);
932 chan->desc_size = sizeof(struct zynqmp_dma_desc_ll);
933 chan->idle = true;
949 return dma_get_slave_channel(&zdev->chan->common);
1094 p->dst_addr_widths = BIT(zdev->chan->bus_width / 8);
1095 p->src_addr_widths = BIT(zdev->chan->bus_width / 8);
1115 zynqmp_dma_chan_remove(zdev->chan);
1136 zynqmp_dma_chan_remove(zdev->chan);