Lines Matching refs:hw_desc

522 	struct xilinx_dpdma_hw_desc *hw_desc = &sw_desc->hw;
525 hw_desc->src_addr = lower_32_bits(dma_addr[0]);
527 hw_desc->addr_ext |=
532 u32 *addr = &hw_desc->src_addr2;
537 u32 *addr_ext = &hw_desc->addr_ext_23;
611 struct xilinx_dpdma_hw_desc *hw_desc = &sw_desc->hw;
615 dev_dbg(dev, "control: 0x%08x\n", hw_desc->control);
616 dev_dbg(dev, "desc_id: 0x%08x\n", hw_desc->desc_id);
617 dev_dbg(dev, "xfer_size: 0x%08x\n", hw_desc->xfer_size);
618 dev_dbg(dev, "hsize_stride: 0x%08x\n", hw_desc->hsize_stride);
619 dev_dbg(dev, "timestamp_lsb: 0x%08x\n", hw_desc->timestamp_lsb);
620 dev_dbg(dev, "timestamp_msb: 0x%08x\n", hw_desc->timestamp_msb);
621 dev_dbg(dev, "addr_ext: 0x%08x\n", hw_desc->addr_ext);
622 dev_dbg(dev, "next_desc: 0x%08x\n", hw_desc->next_desc);
623 dev_dbg(dev, "src_addr: 0x%08x\n", hw_desc->src_addr);
624 dev_dbg(dev, "addr_ext_23: 0x%08x\n", hw_desc->addr_ext_23);
625 dev_dbg(dev, "addr_ext_45: 0x%08x\n", hw_desc->addr_ext_45);
626 dev_dbg(dev, "src_addr2: 0x%08x\n", hw_desc->src_addr2);
627 dev_dbg(dev, "src_addr3: 0x%08x\n", hw_desc->src_addr3);
628 dev_dbg(dev, "src_addr4: 0x%08x\n", hw_desc->src_addr4);
629 dev_dbg(dev, "src_addr5: 0x%08x\n", hw_desc->src_addr5);
630 dev_dbg(dev, "crc: 0x%08x\n", hw_desc->crc);
701 struct xilinx_dpdma_hw_desc *hw_desc;
724 hw_desc = &sw_desc->hw;
726 hw_desc->xfer_size = hsize * xt->numf;
727 hw_desc->hsize_stride =
731 hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_PREEMBLE;
732 hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_COMPLETE_INTR;
733 hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_IGNORE_DONE;
734 hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_LAST_OF_FRAME;