Lines Matching refs:ret
1187 int ret;
1195 ret = xgene_dma_get_ring_size(chan, cfgsize);
1196 if (ret <= 0)
1197 return ret;
1198 ring->size = ret;
1219 int ret;
1225 ret = xgene_dma_create_ring_one(chan, rx_ring,
1227 if (ret)
1228 return ret;
1237 ret = xgene_dma_create_ring_one(chan, tx_ring,
1239 if (ret) {
1241 return ret;
1253 return ret;
1258 int ret, i, j;
1261 ret = xgene_dma_create_chan_rings(&pdma->chan[i]);
1262 if (ret) {
1265 return ret;
1269 return ret;
1405 int ret;
1407 ret = xgene_dma_init_ring_mngr(pdma);
1408 if (ret)
1409 return ret;
1433 int ret, i, j;
1436 ret = devm_request_irq(pdma->dev, pdma->err_irq, xgene_dma_err_isr,
1438 if (ret) {
1441 return ret;
1448 ret = devm_request_irq(chan->dev, chan->rx_irq,
1451 if (ret) {
1462 return ret;
1534 int ret;
1556 ret = dma_async_device_register(dma_dev);
1557 if (ret) {
1558 chan_err(chan, "Failed to register async device %d", ret);
1561 return ret;
1575 int ret, i, j;
1578 ret = xgene_dma_async_register(pdma, i);
1579 if (ret) {
1585 return ret;
1589 return ret;
1702 int ret, i;
1711 ret = xgene_dma_get_resources(pdev, pdma);
1712 if (ret)
1713 return ret;
1723 ret = clk_prepare_enable(pdma->clk);
1724 if (ret) {
1725 dev_err(&pdev->dev, "Failed to enable clk %d\n", ret);
1726 return ret;
1731 ret = xgene_dma_init_mem(pdma);
1732 if (ret)
1735 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(42));
1736 if (ret) {
1745 ret = xgene_dma_init_rings(pdma);
1746 if (ret)
1749 ret = xgene_dma_request_irqs(pdma);
1750 if (ret)
1757 ret = xgene_dma_init_async(pdma);
1758 if (ret)
1775 return ret;