Lines Matching refs:chan
193 #define chan_dbg(chan, fmt, arg...) \
194 dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg)
195 #define chan_err(chan, fmt, arg...) \
196 dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
299 * @chan: reference to X-Gene DMA channels
311 struct xgene_dma_chan chan[XGENE_DMA_MAX_CHANNEL];
413 static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
427 xgene_dma_init_desc(desc1, chan->tx_ring.dst_ring_num);
459 struct xgene_dma_chan *chan;
465 chan = to_dma_chan(tx->chan);
468 spin_lock_bh(&chan->lock);
473 list_splice_tail_init(&desc->tx_list, &chan->ld_pending);
475 spin_unlock_bh(&chan->lock);
480 static void xgene_dma_clean_descriptor(struct xgene_dma_chan *chan,
484 chan_dbg(chan, "LD %p free\n", desc);
485 dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
489 struct xgene_dma_chan *chan)
494 desc = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, &phys);
496 chan_err(chan, "Failed to allocate LDs\n");
503 dma_async_tx_descriptor_init(&desc->tx, &chan->dma_chan);
505 chan_dbg(chan, "LD %p allocated\n", desc);
513 * @chan: X-Gene DMA channel
517 static void xgene_dma_clean_completed_descriptor(struct xgene_dma_chan *chan)
522 list_for_each_entry_safe(desc, _desc, &chan->ld_completed, node) {
524 xgene_dma_clean_descriptor(chan, desc);
530 * @chan: X-Gene DMA channel
536 static void xgene_dma_run_tx_complete_actions(struct xgene_dma_chan *chan,
564 * @chan: X-Gene DMA channel
570 static void xgene_dma_clean_running_descriptor(struct xgene_dma_chan *chan,
585 list_add_tail(&desc->node, &chan->ld_completed);
589 chan_dbg(chan, "LD %p free\n", desc);
590 dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
593 static void xgene_chan_xfer_request(struct xgene_dma_chan *chan,
596 struct xgene_dma_ring *ring = &chan->tx_ring;
626 chan->pending += ((desc_sw->flags &
636 * @chan : X-Gene DMA channel
638 * LOCKING: must hold chan->lock
640 static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
648 if (list_empty(&chan->ld_pending)) {
649 chan_dbg(chan, "No pending LDs\n");
657 list_for_each_entry_safe(desc_sw, _desc_sw, &chan->ld_pending, node) {
664 if (chan->pending >= chan->max_outstanding)
667 xgene_chan_xfer_request(chan, desc_sw);
673 list_move_tail(&desc_sw->node, &chan->ld_running);
680 * @chan: X-Gene DMA channel
686 static void xgene_dma_cleanup_descriptors(struct xgene_dma_chan *chan)
688 struct xgene_dma_ring *ring = &chan->rx_ring;
696 spin_lock(&chan->lock);
699 xgene_dma_clean_completed_descriptor(chan);
702 list_for_each_entry_safe(desc_sw, _desc_sw, &chan->ld_running, node) {
722 chan_err(chan, "%s\n", xgene_dma_desc_err[status]);
748 chan->pending -= ((desc_sw->flags &
763 xgene_chan_xfer_ld_pending(chan);
765 spin_unlock(&chan->lock);
769 xgene_dma_run_tx_complete_actions(chan, desc_sw);
770 xgene_dma_clean_running_descriptor(chan, desc_sw);
776 struct xgene_dma_chan *chan = to_dma_chan(dchan);
779 if (chan->desc_pool)
782 chan->desc_pool = dma_pool_create(chan->name, chan->dev,
785 if (!chan->desc_pool) {
786 chan_err(chan, "Failed to allocate descriptor pool\n");
790 chan_dbg(chan, "Allocate descriptor pool\n");
797 * @chan: X-Gene DMA channel
800 * LOCKING: must hold chan->lock
802 static void xgene_dma_free_desc_list(struct xgene_dma_chan *chan,
808 xgene_dma_clean_descriptor(chan, desc);
813 struct xgene_dma_chan *chan = to_dma_chan(dchan);
815 chan_dbg(chan, "Free all resources\n");
817 if (!chan->desc_pool)
821 xgene_dma_cleanup_descriptors(chan);
823 spin_lock_bh(&chan->lock);
826 xgene_dma_free_desc_list(chan, &chan->ld_pending);
827 xgene_dma_free_desc_list(chan, &chan->ld_running);
828 xgene_dma_free_desc_list(chan, &chan->ld_completed);
830 spin_unlock_bh(&chan->lock);
833 dma_pool_destroy(chan->desc_pool);
834 chan->desc_pool = NULL;
842 struct xgene_dma_chan *chan;
849 chan = to_dma_chan(dchan);
853 new = xgene_dma_alloc_descriptor(chan);
858 xgene_dma_prep_xor_desc(chan, new, &dst, src,
881 xgene_dma_free_desc_list(chan, &first->tx_list);
890 struct xgene_dma_chan *chan;
898 chan = to_dma_chan(dchan);
915 new = xgene_dma_alloc_descriptor(chan);
933 xgene_dma_prep_xor_desc(chan, new, &dst[0], src,
943 xgene_dma_prep_xor_desc(chan, new, &dst[1], _src,
958 xgene_dma_free_desc_list(chan, &first->tx_list);
964 struct xgene_dma_chan *chan = to_dma_chan(dchan);
966 spin_lock_bh(&chan->lock);
967 xgene_chan_xfer_ld_pending(chan);
968 spin_unlock_bh(&chan->lock);
980 struct xgene_dma_chan *chan = from_tasklet(chan, t, tasklet);
983 xgene_dma_cleanup_descriptors(chan);
986 enable_irq(chan->rx_irq);
991 struct xgene_dma_chan *chan = (struct xgene_dma_chan *)id;
993 BUG_ON(!chan);
999 disable_irq_nosync(chan->rx_irq);
1006 tasklet_schedule(&chan->tasklet);
1135 static int xgene_dma_get_ring_size(struct xgene_dma_chan *chan,
1157 chan_err(chan, "Unsupported cfg ring size %d\n", cfgsize);
1177 static void xgene_dma_delete_chan_rings(struct xgene_dma_chan *chan)
1179 xgene_dma_delete_ring_one(&chan->rx_ring);
1180 xgene_dma_delete_ring_one(&chan->tx_ring);
1183 static int xgene_dma_create_ring_one(struct xgene_dma_chan *chan,
1190 ring->pdma = chan->pdma;
1192 ring->num = chan->pdma->ring_num++;
1195 ret = xgene_dma_get_ring_size(chan, cfgsize);
1201 ring->desc_vaddr = dma_alloc_coherent(chan->dev, ring->size,
1204 chan_err(chan, "Failed to allocate ring desc\n");
1215 static int xgene_dma_create_chan_rings(struct xgene_dma_chan *chan)
1217 struct xgene_dma_ring *rx_ring = &chan->rx_ring;
1218 struct xgene_dma_ring *tx_ring = &chan->tx_ring;
1223 rx_ring->buf_num = XGENE_DMA_CPU_BUFNUM + chan->id;
1225 ret = xgene_dma_create_ring_one(chan, rx_ring,
1230 chan_dbg(chan, "Rx ring id 0x%X num %d desc 0x%p\n",
1235 tx_ring->buf_num = XGENE_DMA_BUFNUM + chan->id;
1237 ret = xgene_dma_create_ring_one(chan, tx_ring,
1246 chan_dbg(chan,
1251 chan->max_outstanding = tx_ring->slots;
1261 ret = xgene_dma_create_chan_rings(&pdma->chan[i]);
1264 xgene_dma_delete_chan_rings(&pdma->chan[j]);
1432 struct xgene_dma_chan *chan;
1446 chan = &pdma->chan[i];
1447 irq_set_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1448 ret = devm_request_irq(chan->dev, chan->rx_irq,
1450 0, chan->name, chan);
1452 chan_err(chan, "Failed to register Rx IRQ %d\n",
1453 chan->rx_irq);
1457 chan = &pdma->chan[i];
1458 irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1459 devm_free_irq(chan->dev, chan->rx_irq, chan);
1471 struct xgene_dma_chan *chan;
1478 chan = &pdma->chan[i];
1479 irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1480 devm_free_irq(chan->dev, chan->rx_irq, chan);
1484 static void xgene_dma_set_caps(struct xgene_dma_chan *chan,
1501 if ((chan->id == XGENE_DMA_PQ_CHANNEL) &&
1502 is_pq_enabled(chan->pdma)) {
1505 } else if ((chan->id == XGENE_DMA_XOR_CHANNEL) &&
1506 !is_pq_enabled(chan->pdma)) {
1511 dma_dev->dev = chan->dev;
1532 struct xgene_dma_chan *chan = &pdma->chan[id];
1536 chan->dma_chan.device = dma_dev;
1538 spin_lock_init(&chan->lock);
1539 INIT_LIST_HEAD(&chan->ld_pending);
1540 INIT_LIST_HEAD(&chan->ld_running);
1541 INIT_LIST_HEAD(&chan->ld_completed);
1542 tasklet_setup(&chan->tasklet, xgene_dma_tasklet_cb);
1544 chan->pending = 0;
1545 chan->desc_pool = NULL;
1546 dma_cookie_init(&chan->dma_chan);
1549 xgene_dma_set_caps(chan, dma_dev);
1553 list_add_tail(&chan->dma_chan.device_node, &dma_dev->channels);
1558 chan_err(chan, "Failed to register async device %d", ret);
1559 tasklet_kill(&chan->tasklet);
1566 "%s: CAPABILITY ( %s%s)\n", dma_chan_name(&chan->dma_chan),
1582 tasklet_kill(&pdma->chan[j].tasklet);
1602 struct xgene_dma_chan *chan;
1608 chan = &pdma->chan[i];
1609 chan->dev = pdma->dev;
1610 chan->pdma = pdma;
1611 chan->id = i;
1612 snprintf(chan->name, sizeof(chan->name), "dmachan%d", chan->id);
1693 pdma->chan[i - 1].rx_irq = irq;
1768 xgene_dma_delete_chan_rings(&pdma->chan[i]);
1781 struct xgene_dma_chan *chan;
1792 chan = &pdma->chan[i];
1793 tasklet_kill(&chan->tasklet);
1794 xgene_dma_delete_chan_rings(chan);