Lines Matching defs:dma_dev
298 * @dma_dev: embedded struct dma_device
310 struct dma_device dma_dev[XGENE_DMA_MAX_CHANNEL];
1485 struct dma_device *dma_dev)
1488 dma_cap_zero(dma_dev->cap_mask);
1503 dma_cap_set(DMA_PQ, dma_dev->cap_mask);
1504 dma_cap_set(DMA_XOR, dma_dev->cap_mask);
1507 dma_cap_set(DMA_XOR, dma_dev->cap_mask);
1511 dma_dev->dev = chan->dev;
1512 dma_dev->device_alloc_chan_resources = xgene_dma_alloc_chan_resources;
1513 dma_dev->device_free_chan_resources = xgene_dma_free_chan_resources;
1514 dma_dev->device_issue_pending = xgene_dma_issue_pending;
1515 dma_dev->device_tx_status = xgene_dma_tx_status;
1517 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1518 dma_dev->device_prep_dma_xor = xgene_dma_prep_xor;
1519 dma_dev->max_xor = XGENE_DMA_MAX_XOR_SRC;
1520 dma_dev->xor_align = DMAENGINE_ALIGN_64_BYTES;
1523 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
1524 dma_dev->device_prep_dma_pq = xgene_dma_prep_pq;
1525 dma_dev->max_pq = XGENE_DMA_MAX_XOR_SRC;
1526 dma_dev->pq_align = DMAENGINE_ALIGN_64_BYTES;
1533 struct dma_device *dma_dev = &pdma->dma_dev[id];
1536 chan->dma_chan.device = dma_dev;
1549 xgene_dma_set_caps(chan, dma_dev);
1552 INIT_LIST_HEAD(&dma_dev->channels);
1553 list_add_tail(&chan->dma_chan.device_node, &dma_dev->channels);
1556 ret = dma_async_device_register(dma_dev);
1567 dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "XOR " : "",
1568 dma_has_cap(DMA_PQ, dma_dev->cap_mask) ? "PQ " : "");
1581 dma_async_device_unregister(&pdma->dma_dev[j]);
1597 dma_async_device_unregister(&pdma->dma_dev[i]);