Lines Matching defs:desc
145 const struct txx9dmac_desc *desc)
147 return is_dmac64(dc) ? desc->hwdesc.CHAR : desc->hwdesc32.CHAR;
151 struct txx9dmac_desc *desc, dma_addr_t val)
154 desc->hwdesc.CHAR = val;
156 desc->hwdesc32.CHAR = val;
180 static struct txx9dmac_desc *txx9dmac_last_child(struct txx9dmac_desc *desc)
182 if (!list_empty(&desc->tx_list))
183 desc = list_entry(desc->tx_list.prev, typeof(*desc), desc_node);
184 return desc;
193 struct txx9dmac_desc *desc;
195 desc = kzalloc(sizeof(*desc), flags);
196 if (!desc)
198 INIT_LIST_HEAD(&desc->tx_list);
199 dma_async_tx_descriptor_init(&desc->txd, &dc->chan);
200 desc->txd.tx_submit = txx9dmac_tx_submit;
202 desc->txd.flags = DMA_CTRL_ACK;
203 desc->txd.phys = dma_map_single(chan2parent(&dc->chan), &desc->hwdesc,
205 return desc;
210 struct txx9dmac_desc *desc, *_desc;
215 list_for_each_entry_safe(desc, _desc, &dc->free_list, desc_node) {
216 if (async_tx_test_ack(&desc->txd)) {
217 list_del(&desc->desc_node);
218 ret = desc;
221 dev_dbg(chan2dev(&dc->chan), "desc %p not ACKed\n", desc);
242 struct txx9dmac_desc *desc)
247 list_for_each_entry(child, &desc->tx_list, desc_node)
252 desc->txd.phys, ddev->descsize,
258 * `desc' must not be on any lists.
261 struct txx9dmac_desc *desc)
263 if (desc) {
266 txx9dmac_sync_desc_for_cpu(dc, desc);
269 list_for_each_entry(child, &desc->tx_list, desc_node)
271 "moving child desc %p to freelist\n",
273 list_splice_init(&desc->tx_list, &dc->free_list);
274 dev_vdbg(chan2dev(&dc->chan), "moving desc %p to freelist\n",
275 desc);
276 list_add(&desc->desc_node, &dc->free_list);
400 struct txx9dmac_desc *desc)
403 struct dma_async_tx_descriptor *txd = &desc->txd;
406 txd->cookie, desc);
411 txx9dmac_sync_desc_for_cpu(dc, desc);
412 list_splice_init(&desc->tx_list, &dc->free_list);
413 list_move(&desc->desc_node, &dc->free_list);
427 struct txx9dmac_desc *desc;
432 desc = txx9dmac_first_queued(dc);
434 desc_write_CHAR(dc, prev, desc->txd.phys);
439 prev = txx9dmac_last_child(desc);
440 list_move_tail(&desc->desc_node, list);
442 if ((desc->txd.flags & DMA_PREP_INTERRUPT) &&
450 struct txx9dmac_desc *desc, *_desc;
463 list_for_each_entry_safe(desc, _desc, &list, desc_node)
464 txx9dmac_descriptor_complete(dc, desc);
468 struct txx9dmac_hwdesc *desc)
473 " desc: ch%#llx s%#llx d%#llx c%#x\n",
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR);
477 " desc: ch%#llx s%#llx d%#llx c%#x"
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR,
480 desc->SAIR, desc->DAIR, desc->CCR, desc->CSR);
483 struct txx9dmac_hwdesc32 *d = (struct txx9dmac_hwdesc32 *)desc;
486 " desc: ch%#x s%#x d%#x c%#x\n",
490 " desc: ch%#x s%#x d%#x c%#x"
539 struct txx9dmac_desc *desc, *_desc;
564 list_for_each_entry_safe(desc, _desc, &dc->active_list, desc_node) {
565 if (desc_read_CHAR(dc, desc) == chain) {
572 list_for_each_entry(child, &desc->tx_list, desc_node)
584 txx9dmac_descriptor_complete(dc, desc);
692 struct txx9dmac_desc *desc = txd_to_txx9dmac_desc(tx);
700 desc->txd.cookie, desc);
702 list_add_tail(&desc->desc_node, &dc->queue);
714 struct txx9dmac_desc *desc;
748 desc = txx9dmac_desc_get(dc);
749 if (!desc) {
755 desc->hwdesc.SAR = src + offset;
756 desc->hwdesc.DAR = dest + offset;
757 desc->hwdesc.CNTR = xfer_count;
758 txx9dmac_desc_set_nosimple(ddev, desc, 8, 8,
761 desc->hwdesc32.SAR = src + offset;
762 desc->hwdesc32.DAR = dest + offset;
763 desc->hwdesc32.CNTR = xfer_count;
764 txx9dmac_desc_set_nosimple(ddev, desc, 4, 4,
776 first = desc;
778 desc_write_CHAR(dc, prev, desc->txd.phys);
782 list_add_tail(&desc->desc_node, &first->tx_list);
784 prev = desc;
828 struct txx9dmac_desc *desc;
832 desc = txx9dmac_desc_get(dc);
833 if (!desc) {
842 desc->hwdesc.SAR = mem;
843 desc->hwdesc.DAR = ds->tx_reg;
845 desc->hwdesc.SAR = ds->rx_reg;
846 desc->hwdesc.DAR = mem;
848 desc->hwdesc.CNTR = sg_dma_len(sg);
851 desc->hwdesc32.SAR = mem;
852 desc->hwdesc32.DAR = ds->tx_reg;
854 desc->hwdesc32.SAR = ds->rx_reg;
855 desc->hwdesc32.DAR = mem;
857 desc->hwdesc32.CNTR = sg_dma_len(sg);
866 txx9dmac_desc_set_nosimple(ddev, desc, sai, dai,
870 first = desc;
872 desc_write_CHAR(dc, prev, desc->txd.phys);
877 list_add_tail(&desc->desc_node, &first->tx_list);
879 prev = desc;
900 struct txx9dmac_desc *desc, *_desc;
915 list_for_each_entry_safe(desc, _desc, &list, desc_node)
916 txx9dmac_descriptor_complete(dc, desc);
943 struct txx9dmac_desc *desc;
948 desc = list_entry(list.next, struct txx9dmac_desc, desc_node);
949 desc_write_CHAR(dc, prev, desc->txd.phys);
956 channel_write_CHAR(dc, desc->txd.phys);
988 struct txx9dmac_desc *desc;
1023 desc = txx9dmac_desc_alloc(dc, GFP_KERNEL);
1024 if (!desc) {
1030 txx9dmac_desc_put(dc, desc);
1047 struct txx9dmac_desc *desc, *_desc;
1063 list_for_each_entry_safe(desc, _desc, &list, desc_node) {
1064 dev_vdbg(chan2dev(chan), " freeing descriptor %p\n", desc);
1065 dma_unmap_single(chan2parent(chan), desc->txd.phys,
1067 kfree(desc);